Abstract: The invention relates to RNA constructs, and particularly, although not exclusively, to mRNA constructs and saRNA replicons and to nucleic acids and expression vectors encoding such RNA constructs. The invention extends to the use of such RNA constructs in therapy, for example in treating diseases and/or in vaccine delivery. The invention extends to pharmaceutical compositions comprising such RNA constructs, and methods and uses thereof.

Abstract: The present invention relates to RNA constructs, and particularly, although not exclusively, to mRNA constructs and saRNA replicons and to nucleic acids and expression vectors encoding such RNA constructs. The invention extends to the use of such RNA constructs in therapy, for example in treating diseases and/or in vaccine delivery. The invention extends to pharmaceutical compositions comprising such RNA constructs, and methods and uses thereof.

Abstract: The invention relates to RNA constructs, and particularly, although not exclusively, to mRNA constructs and saRNA replicons and to nucleic acids and expression vectors encoding such RNA constructs. The invention extends to the use of such RNA constructs in therapy, for example in treating diseases and/or in vaccine delivery. The invention extends to pharmaceutical compositions comprising such RNA constructs, and methods and uses thereof.

Abstract: The invention relates to vaccines, and in particular, to vaccines for preventing, treating or ameliorating coronavirus infections, such as severe acute respiratory syndrome coronavirus (SARS), SARS-CoV-2 and Middle East respiratory syndrome-related coronavirus (MERS). The invention is especially concerned with self-amplifying RNA replicons and genetic constructs or vectors encoding such RNA replicons, and their use in vaccine delivery for preventing infections of coronavirus. The invention extends to pharmaceutical compositions comprising such RNA constructs, and methods and uses thereof.

Abstract: The invention relates to RNA constructs encoding (i) at least one therapeutic biomolecule; and (ii) at least one innate inhibitor protein (IIP). The constructs are RNA replicons and saRNA molecules, and the invention includes genetic constructs or vectors encoding such RNA replicons. The invention extends to the use of such RNA constructs and replicons in therapy, for example in treating diseases and/or in vaccine delivery. The invention extends to pharmaceutical compositions comprising such RNA constructs, and methods and uses thereof.

Abstract: The invention relates to fusion proteins, and to the use of fusion proteins (or genetic constructs or vectors encoding such fusion proteins) to vaccinate against viral infections. The invention extends to pharmaceutical compositions comprising such fusion proteins or constructs for preventing and treating viral infections, and to methods and uses thereof.

Abstract: A DMOS transistor integrates a trench Schottky diode into the body contact of the transistor where the body region surrounding the Schottky metal layer forms a guard ring for the Schottky diode.

Abstract: A DMOS transistor integrates a trench Schottky diode into the body contact of the transistor where the body region surrounding the Schottky metal layer forms a guard ring for the Schottky diode.

Abstract: A system facilitates one handed manipulation of a service pistol and includes a device having two components and related inserts that allow for single handed loading, cycling, firing, clearing and unloading of semi-automatic pistols. The present device includes a spine; and a retainer attached to the spine wherein the retainer comprises at least a first groove tapering from a first width towards the pivotal attachment between the cover and spine to a second width towards the front edge of the cover.

Abstract: A DMOS transistor integrates a trench Schottky diode into the body contact of the transistor where the body region surrounding the Schottky metal layer forms a guard ring for the Schottky diode.

Abstract: A DMOS transistor integrates a trench Schottky diode into the body contact of the transistor where the body region surrounding the Schottky metal layer forms a guard ring for the Schottky diode.

Abstract: A system facilitates one handed manipulation of a service pistol and includes a device having two components and related inserts that allow for single handed loading, cycling, firing, clearing and unloading of semi-automatic pistols. The present device includes a spine, a cover pivotally attached to the spine and operable under action of a user from a first normally closed position and a second open position, a spring connected to the cover and spine holding the cover without a first action of a user in the first normally closed position. A base is dimensioned to support a firearm magazine such that the firearm magazine is axially aligned to an axis of the spine; and a pair of retaining arms are attached to the spine for retaining the firearm magazine within the device without a second action of the user and releasing the firearm magazine under the second action of the user.

Abstract: A system facilitates one handed manipulation of a service pistol and includes a device having two components and related inserts that allow for single handed loading, cycling, firing, clearing and unloading of semi-automatic pistols. The present device includes a spine, a cover pivotally attached to the spine and operable under action of a user from a first normally closed position and a second open position, a spring connected to the cover and spine holding the cover without a first action of a user in the first normally closed position. A base is dimensioned to support a firearm magazine such that the firearm magazine is axially aligned to an axis of the spine; and a pair of retaining arms are attached to the spine for retaining the firearm magazine within the device without a second action of the user and releasing the firearm magazine under the second action of the user.

Abstract: The present invention provides a laterally diffused metal oxide semiconductor (LDMOS) transistor and a method for fabricating it. The LDMOS transistor includes an n-type epitaxial layer formed on a p-type substrate, and an asymmetric conductive spacer which acts as its gate. The LDMOS transistor also includes a source and a drain region on either side of the asymmetric conductive spacer, and a channel region formed by ion-implantation on the asymmetric conductive spacer. The height of the asymmetric conductive spacer increases from the source region to the drain region. The channel region is essentially completely under the asymmetric conductive spacer and has smaller length than that of the channel region of the prior art LDMOS transistors. The LDMOS transistor of the present invention also includes a field oxide layer surrounding the active region of the transistor, and a thin dielectric layer isolating the asymmetric conductive spacer from the n-type epitaxial layer.

Abstract: The present invention provides an FET which includes an epitaxial layer and first and second body regions formed over the epitaxial layer. Further, the FET includes a first trench formed in the epitaxial layer between the first and the second body regions. The FET also includes a conductive layer formed on the sidewall of the first trench. The conductive layer acts as gate of the FET. The FET also includes a second trench formed at the bottom of the first trench, a first dielectric layer formed over the conductive layer and on the sidewall of the second trench, and a second dielectric layer formed on the first dielectric layer. Further, the FET includes a conductive layer, which acts as drain, deposited in the first and the second trenches. The FET also includes first and a second source regions formed in the first and second body regions, respectively.

Abstract: The present invention provides a laterally diffused metal oxide semiconductor (LDMOS) transistor and a method for fabricating it. The LDMOS transistor includes an n-type epitaxial layer formed on a p-type substrate, and an asymmetric conductive spacer which acts as its gate. The LDMOS transistor also includes a source and a drain region on either side of the asymmetric conductive spacer, and a channel region formed by ion-implantation on the asymmetric conductive spacer. The height of the asymmetric conductive spacer increases from the source region to the drain region. The channel region is essentially completely under the asymmetric conductive spacer and has smaller length than that of the channel region of the prior art LDMOS transistors. The LDMOS transistor of the present invention also includes a field oxide layer surrounding the active region of the transistor, and a thin dielectric layer isolating the asymmetric conductive spacer from the n-type epitaxial layer.

Abstract: The present invention provides a pixel array and a process flow for forming an array of pixel cells that features pixel electrodes having overlapping edges. This overlapping pixel configuration precludes absorption of light in inter-pixel regions that could give rise to the appearance of dark lines between bright reflective pixel electrodes. This pixel arrangement also prevents the disruption of charge stored in underlying capacitor structures due to the penetration of incident light through inter-pixel regions into the underlying substrate.

Abstract: A pixel cell for a silicon LC light valve features a plurality of transparent electrically conducting pixel electrodes formed over a grounded reflective metal backplane. Dielectric material intervenes between the transparent electrodes and the grounded reflective backplane. This dielectric material, alone or in combination with the transparent electrode, creates a reflectance enhancing coating generating constructive interference of light reflected by the underlying backplane. The dielectric material also serves as the dielectric of an additional capacitive component having the active electrode and the grounded reflective metal backplane as plates. This architecture enhances the storage capacitance of the pixel cell, lowering sensitivity of the pixel to current leakage and reducing the pixel cell surface area. This pixel architecture also reduces the appearance of dark lines attributable to absorption of light in inter-pixel regions.

Abstract: The present invention provides a pixel array and a process flow for forming an array of pixel cells that features pixel electrodes having overlapping edges. This overlapping pixel configuration precludes absorption of light in inter-pixel regions that could give rise to the appearance of dark lines between bright reflective pixel electrodes. This pixel arrangement also prevents the disruption of charge stored in underlying capacitor structures due to the penetration of incident light through inter-pixel regions into the underlying substrate.

Abstract: A receiver receives a signal transmitted by a time-division multi-access method that divides one frame into a plurality of communication slots in conducting communication. In this receiver, a detection circuit detects whether a received RF signal is stronger than a predetermined level. The received RF signal is demodulated by a demodulation circuit. An oscillation circuit generates a clock that is used to decode the data obtained by demodulation. The data obtained by demodulation is stored in a memory in synchronism with a clock reproduced from the received signal, and is then retrieved from the memory in synchronism with the clock generated by the oscillation circuit. This eliminates jitters. After jitter elimination, the data is decoded by a processing circuit. The writing/reading operation against the memory is initialized in accordance with a result output from the detection circuit.