Abstract: Disclosed is system for inactivating bacteria and/or reducing microbial count on product, in particular a food product, susceptible to microbial presence, said system comprising a processing chamber which is operably connected to i) a means for generating UV-C light, ii) a means for generating hydrogen peroxide vapor and/or means for generating ozone, and iii) a heat source. Also disclosed is a method for inactivating bacteria and/or reducing microbial count on a product, in particular food product, which is susceptible to microbial presence, said method comprising subjecting said product in a processing chamber to exposure with ultraviolet C (UV-C) light and hydrogen peroxide vapor and/or ozone, and heat, for a processing time of between 5-120 seconds, wherein the hydrogen peroxide vapor is present at up to 12% v/v solution, and the temperature inside the processing chamber is maintained between about 22° C. and 60° C.

Abstract: A processing system adjusts a cache replacement priority of cache lines at a cache based on evictions of entries mapping virtual-to-physical address translations from a translation lookaside buffer (TLB). Upon eviction of a TLB entry, the processing system identifies cache lines corresponding to the physical addresses of the evicted TLB entry and evicts the cache lines or adjusts the cache replacement priority of the cache lines so that their eviction from the cache will be accelerated.

Abstract: A method includes recording a first set of cache performance metrics for a target cache, for each prefetch request of a plurality of prefetch requests received at the target cache, determining based on the first set of cache performance metrics a relative priority of the prefetch request relative to a threshold priority level for the target cache, for each low-priority prefetch request of the plurality of prefetch requests, redirecting the low-priority prefetch request to a first lower-level cache in response to determining that a priority of the low-priority prefetch request is less than the threshold priority level for the target cache, and for each high-priority prefetch request of the plurality of prefetch requests, storing prefetch data in the target cache according to the high-priority prefetch request in response to determining that a priority of the high-priority prefetch request is greater than the threshold priority level for the target cache.

Abstract: A processor includes a cache having two or more test regions and a larger non-test region. The processor further includes a cache controller that applies different cache replacement policies to the different test regions of the cache, and a performance monitor that measures performance metrics for the different test regions, such as a cache hit rate at each test region. Based on the performance metrics, the cache controller selects a cache replacement policy for the non-test region, such as selecting the replacement policy associated with the test region having the better performance metrics among the different test regions. The processor deskews the memory access measurements in response to a difference in the amount of accesses to the different test regions exceeding a threshold.

Abstract: A processing system adjusts a cache replacement priority of cache lines at a cache based on evictions of entries mapping virtual-to-physical address translations from a translation lookaside buffer (TLB). Upon eviction of a TLB entry, the processing system identifies cache lines corresponding to the physical addresses of the evicted TLB entry and evicts the cache lines or adjusts the cache replacement priority of the cache lines so that their eviction from the cache will be accelerated.

Abstract: A cache controller applies an aging policy to a portion of a cache based on access metrics for different test regions of the cache, whereby each test region implements a different aging policy. The aging policy for each region establishes an initial age value for each entry of the cache, and a particular aging policy can set the age for a given entry based on whether the entry was placed in the cache in response to a demand request from a processor core or in response to a prefetch request. The cache controller can use the age value of each entry as a criterion in its cache replacement policy.

Abstract: A cache controller determines replacement priority for cache lines at a cache based on data stored at non-cache buffers. In response to determining that a cache line at the cache is to be replaced, the cache controller identifies a set of candidate cache lines for replacement. The cache controller probes the non-cache buffers to identify any entries that are assigned to the same memory address as a candidate cache line and adjusts the replacement priorities for the candidate cache lines based on the probe responses. The cache controller deprioritizes for replacement cache lines associated with entries of the non-cache buffers.

Abstract: A system includes one or more processor cores and a cache hierarchy. The cache hierarchy includes a first-level cache, a second-level cache, and a third-level cache. The cache hierarchy further includes cache hierarchy control logic configured to implement a caching policy in which each cacheline cached in the first-level cache has a copy of the cacheline cached in at least one of the second-level cache and the third-level cache. The caching policy further provides that an eviction of a cacheline from the second-level cache does not trigger an eviction of a copy of that cacheline from the first-level cache, and that an eviction of a cacheline from the third-level cache triggers the cache hierarchy control logic to evict a copy of that cacheline from the first-level cache when the cacheline is not present in the second-level cache.

Abstract: A cache controller applies an aging policy to a portion of a cache based on access metrics for different test regions of the cache, whereby each test region implements a different aging policy. The aging policy for each region establishes an initial age value for each entry of the cache, and a particular aging policy can set the age for a given entry based on whether the entry was placed in the cache in response to a demand request from a processor core or in response to a prefetch request. The cache controller can use the age value of each entry as a criterion in its cache replacement policy.

Abstract: A method for steering data for an I/O write operation includes, in response to receiving the I/O write operation, identifying, at an interconnect fabric, a cache of one of a plurality of compute complexes as a target cache for steering the data based on at least one of: a software-provided steering indicator, a steering configuration implemented at boot initialization, and coherency information for a cacheline associated with the data. The method further includes directing, via the interconnect fabric, the identified target cache to cache the data from the I/O write operation. The data is temporarily buffered at the interconnect fabric, and if the target cache attempts to fetch the data while the data is still buffered at the interconnect fabric, the interconnect fabric provides a copy of the buffered data in response to the fetch operation instead of initiating a memory access operation to obtain the data from memory.

Abstract: A method for steering data for an I/O write operation includes, in response to receiving the I/O write operation, identifying, at an interconnect fabric, a cache of one of a plurality of compute complexes as a target cache for steering the data based on at least one of: a software-provided steering indicator, a steering configuration implemented at boot initialization, and coherency information for a cacheline associated with the data. The method further includes directing, via the interconnect fabric, the identified target cache to cache the data from the I/O write operation. The data is temporarily buffered at the interconnect fabric, and if the target cache attempts to fetch the data while the data is still buffered at the interconnect fabric, the interconnect fabric provides a copy of the buffered data in response to the fetch operation instead of initiating a memory access operation to obtain the data from memory.

Abstract: A cache controller determines replacement priority for cache lines at a cache based on data stored at non-cache buffers. In response to determining that a cache line at the cache is to be replaced, the cache controller identifies a set of candidate cache lines for replacement. The cache controller probes the non-cache buffers to identify any entries that are assigned to the same memory address as a candidate cache line and adjusts the replacement priorities for the candidate cache lines based on the probe responses. The cache controller deprioritizes for replacement cache lines associated with entries of the non-cache buffers.

Abstract: A system includes one or more processor cores and a cache hierarchy. The cache hierarchy includes a first-level cache, a second-level cache, and a third-level cache. The cache hierarchy further includes cache hierarchy control logic configured to implement a caching policy in which each cacheline cached in the first-level cache has a copy of the cacheline cached in at least one of the second-level cache and the third-level cache. The caching policy further provides that an eviction of a cacheline from the second-level cache does not trigger an eviction of a copy of that cacheline from the first-level cache, and that an eviction of a cacheline from the third-level cache triggers the cache hierarchy control logic to evict a copy of that cacheline from the first-level cache when the cacheline is not present in the second-level cache.

Abstract: Disclosed is system for inactivating bacteria and/or reducing microbial count on product, in particular a food product, susceptible to microbial presence, said system comprising a processing chamber which is operably connected to i) a means for generating UV-C light, ii) a means for generating hydrogen peroxide vapor and/or means for generating ozone, and iii) a heat source. Also disclosed is a method for inactivating bacteria and/or reducing microbial count on a product, in particular food product, which is susceptible to microbial presence, said method comprising subjecting said product in a processing chamber to exposure with ultraviolet C (UV-C) light and hydrogen peroxide vapor and/or ozone, and heat, for a processing time of between 5-120 seconds, wherein the hydrogen peroxide vapor is present at up to 12% v/v solution, and the temperature inside the processing chamber is maintained between about 22° C. and 60° C.

Abstract: A processor applies a software hint policy to a portion of a cache based on access metrics for different test regions of the cache, wherein each test region applies a different software hint policy for data associated with cache entries in each region of the cache. One test region applies a software hint policy under which software hints are followed. The other test region applies a software hint policy under which software hints are ignored. One of the software hint policies is selected for application to a non-test region of the cache.

Abstract: Disclosed is an apparatus for inactivating bacteria and/or reducing microbial count on a food product or a container therefore, which is susceptible to surface and sub-surface microbial presence is provided, said apparatus comprising a sealable chamber which is operably connected to i) an ozone generator for generating ozone gas, and ii) an evacuation fan for forcing movement of ozone gas through the sealable chamber.

Abstract: A cache controller applies an aging policy to a portion of a cache based on access metrics for different test regions of the cache, whereby each test region implements a different aging policy. The aging policy for each region establishes an initial age value for each entry of the cache, and a particular aging policy can set the age for a given entry based on whether the entry was placed in the cache in response to a demand request from a processor core or in response to a prefetch request. The cache controller can use the age value of each entry as a criterion in its cache replacement policy.

Abstract: A system, method and computer readable medium are provided for monitoring functionality of multiple network interfaces and providing fault recovery. The network interfaces are grouped into nodes and a monitoring address is assigned to each of the network interfaces such that the monitoring address for each of the network interfaces is on a different subnet than the monitoring addresses for all of the other network interfaces in the same node as that network interface. According to the method, each of the network interfaces is assigned one or more recovery addresses that each are different than its monitoring address. A monitoring message is periodically sent to each of the network interfaces via the monitoring addresses in order to determine the functionality of the network interfaces. If no monitoring message is received within a predetermined period, a recovery operation is performed for one of the network interfaces using one or more recovery addresses of the one network interface.

Abstract: A system, method and computer readable medium are provided for configuring network interfaces grouped into nodes for monitoring functionality. According to the method, a base address and subnet mask for the network interfaces are received, and a monitoring address is automatically generated for each of the network interfaces based on the base address, the subnet mask, and the nodes. The monitoring addresses is generated such that the monitoring address for each of the network interfaces is on a different subnet than the monitoring addresses for all of the other network interfaces in the same node as that network interface. Additionally, the monitoring addresses are assigned to the network interfaces for use by the monitoring process, with each of the monitoring addresses being assigned by being added as an additional network interface address of its network interface. Also provided is a method for monitoring functionality of network interfaces and providing fault recovery.

Abstract: The invention relates to compounds of the formula and to pharmaceutically acceptable salts thereof, wherein R1, R2 and Z are as defined herein. The invention also relates to pharmaceutical compositions containing the compounds of formula I and to methods of using said compounds in the treatment of hyperproliferative diseases such as cancer.