Abstract: A computer system having an Advance Configuration and Power Interface-compliant, or ACPI, operating system performs certain machine specific tasks before going to a low power state. When the computer operating system indicates that entry into the low power state is desired, a microcontroller embedded in an input/output chip is alerted. Synchronization between the main processor of the computer system and the embedded microcontroller of the ACPI operating system is achieved, reducing the likelihood of system failure on the next boot operation. The embedded microcontroller then also causes the state of devices connected to the input/output chip to be saved. This helps the machine to go to a known state during the resume process.

Abstract: A computer system having an Advance Configuration and Power Interface-compliant, or ACPI, operating system performs certain machine specific tasks before going to a low power state. When the computer operating system indicates that entry into the low power state is desired, a microcontroller embedded in an input/output chip is alerted. Synchronization between the main processor of the computer system and the embedded microcontroller of the ACPI operating system is achieved, reducing the likelihood of system failure on the next boot operation. The embedded microcontroller then also causes the state of devices connected to the input/output chip to be saved. This helps the machine to go to a known state during the resume process.

Abstract: A computer system having an Advance Configuration and Power Interface-compliant, or ACPI, operating system performs certain machine specific tasks before going to a low power state. When the computer operating system indicates that entry into the low power state is desired, a microcontroller embedded in an input/output chip is alerted. Synchronization between the main processor of the computer system and the embedded microcontroller of the ACPI operating system is achieved, reducing the likelihood of system failure on the next boot operation. The embedded microcontroller then also causes the state of devices connected to the input/output chip to be saved. This helps the machine to go to a known state during the resume process.

Abstract: A break event in a computer system that can operate in one of a plurality of modes, such as a high performance mode and a low power mode is initiated only be logic that that detects when the transition between modes is complete. In the high performance mode, the CPU clock is faster than in the low power mode. The CPU voltage may also be higher in the high performance mode than in the low speed mode. The low power mode may be desirable for a portable computer operating from battery power in order to conserve the battery's charge. The computer system preferably transitions its CPU to a “sleep” state during the mode switch and precludes devices not associated with the mode transition from “waking” the CPU and disturbing the completion of the mode switch. Accordingly, only logic that detects the end of the mode switch can break the CPU out of its sleep state.