Abstract: Disclosed are field effect transistor-based (FET-based) sensors for the rapid and accurate detection of analytes both in vivo and in vitro. The FET-based sensors can include a substrate, a channel disposed on the substrate, a source electrode and a drain electrode electrically connected to the channel, and a recognition element for an analyte of interest immobilized on the surface of the channel via a linking group. The distance between the recognition element and the channel can be configured such that association of the analyte of interest with the recognition element induces a change in the electrical properties of the channel. In this way, an analyte of interest can be detected by measuring a change in an electrical property of the channel. Also provided are devices, including probes and multi-well plates, incorporating the FET-based sensors.

Abstract: Gallium nitride based devices and, more particularly to the generation of holes in gallium nitride based devices lacking p-type doping, and their use in light emitting diodes and lasers, both edge emitting and vertical emitting. By tailoring the intrinsic design, a wide range of wavelengths can be emitted from near-infrared to mid ultraviolet, depending upon the design of the adjacent cross-gap recombination zone. The innovation also provides for novel circuits and unique applications, particularly for water sterilization.

Abstract: Gallium nitride based devices and, more particularly to the generation of holes in gallium nitride based devices lacking p-type doping, and their use in light emitting diodes and lasers, both edge emitting and vertical emitting. By tailoring the intrinsic design, a wide range of wavelengths can be emitted from near-infrared to mid ultraviolet, depending upon the design of the adjacent cross-gap recombination zone. The innovation also provides for novel circuits and unique applications, particularly for water sterilization.

Abstract: A p-channel tunneling field effect transistor (TFET) is selected from a group consisting of (i) a multi-layer structure of group IV layers and (ii) a multi-layer structure of group III-V layers. The p-channel TFET includes a channel region comprising one of a silicon-germanium alloy with non-zero germanium content and a ternary III-V alloy. An n-channel TFET is selected from a group consisting of (i) a multi-layer structure of group IV layers and (ii) a multi-layer structure of group III-V layers. The n-channel TFET includes an n-type region, a p-type region with a p-type delta doping, and a channel region disposed between and spacing apart the n-type region and the p-type region. The p-channel TFET and the n-channel TFET may be electrically connected to define a complementary field-effect transistor element. TFETs may be fabricated from a silicon-germanium TFET layer structure grown by low temperature molecular beam epitaxy at a growth temperature at or below 500° C.

Abstract: An ion-sensitive sensor includes a dielectric layer comprising Al2O3 having a functionalized surface configured to bond with an analyte. The ion-sensitive sensor is immersed in an electrolytic solution containing a concentration of alkali ions. An electrode is arranged to apply an electric potential to the functionalized surface of the ion-sensitive sensor. In some embodiments the ion-sensitive sensor is an ion-sensitive silicon FET. In some embodiments the ion-sensitive sensor is an ion-sensitive polymer FET. In some embodiments, the electrode comprises a perforated gate metal layer disposed on the gate dielectric layer of an ion-sensitive FET, and the functionalized surface is disposed in openings of the perforated gate metal layer. In some embodiments the dielectric layer comprises a multi-layer dielectric stack including at least one Al2O3 layer. In some embodiments the dielectric layer is deposited by atomic layer deposition (ALD).

Abstract: Disclosed are field effect transistor-based (FET-based) sensors for the rapid and accurate detection of analytes both in vivo and in vitro. The FET-based sensors can include a substrate, a channel disposed on the substrate, a source electrode and a drain electrode electrically connected to the channel, and a recognition element for an analyte of interest immobilized on the surface of the channel via a linking group. The distance between the recognition element and the channel can be configured such that association of the analyte of interest with the recognition element induces a change in the electrical properties of the channel. In this way, an analyte of interest can be detected by measuring a change in an electrical property of the channel. Also provided are devices, including probes and multi-well plates, incorporating the FET-based sensors.

Abstract: A p-channel tunneling field effect transistor (TFET) is selected from a group consisting of (i) a multi-layer structure of group IV layers and (ii) a multi-layer structure of group III-V layers. The p-channel TFET includes a channel region comprising one of a silicon-germanium alloy with non-zero germanium content and a ternary III-V alloy. An n-channel TFET is selected from a group consisting of (i) a multi-layer structure of group IV layers and (ii) a multi-layer structure of group III-V layers. The n-channel TFET includes an n-type region, a p-type region with a p-type delta doping, and a channel region disposed between and spacing apart the n-type region and the p-type region. The p-channel TFET and the n-channel TFET may be electrically connected to define a complementary field-effect transistor element. TFETs may be fabricated from a silicon-germanium TFET layer structure grown by low temperature molecular beam epitaxy at a growth temperature at or below 500° C.

Abstract: A p-channel tunneling field effect transistor (TFET) is selected from a group consisting of (i) a multi-layer structure of group IV layers and (ii) a multi-layer structure of group III-V layers. The p-channel TFET includes a channel region comprising one of a silicon-germanium alloy with non-zero germanium content and a ternary III-V alloy. An n-channel TFET is selected from a group consisting of (i) a multi-layer structure of group IV layers and (ii) a multi-layer structure of group III-V layers. The n-channel TFET includes an n-type region, a p-type region with a p-type delta doping, and a channel region disposed between and spacing apart the n-type region and the p-type region. The p-channel TFET and the n-channel TFET may be electrically connected to define a complementary field-effect transistor element. TFETs may be fabricated from a silicon-germanium TFET layer structure grown by low temperature (500 degrees Centigrade) molecular beam epitaxy.

Abstract: A p-channel tunneling field effect transistor (TFET) is selected from a group consisting of (i) a multi-layer structure of group IV layers and (u) a multi-layer structure of group III-V layers. The p-channel TFET includes a channel region comprising one of a silicon-germanium alloy with non-zero germanium content and a ternary III-V alloy. An n-channel TFET is selected from a group consisting of (i) a multi-layer structure of group IV layers and (u) a multi-layer structure of group III-V layers. The n-channel TFET includes an n-type region, a p-type region with a p-type delta doping, and a channel region disposed between and spacing apart the n-type region and the p-type region. The p-channel TFET and the n-channel TFET may be electrically connected to define a complementary field-effect transistor element. TFETs may be fabricated from a silicon-germanium TFET layer structure grown by low temperature (500 degrees Centigrade) molecular beam epitaxy.

Abstract: Some disclosed interband tunneling diodes comprise a plurality of substantially coherently strained layers including layers selected from a group consisting of silicon, germanium, and alloys of silicon and germanium, wherein at least one of said substantially coherently strained layers is tensile strained. Some disclosed resonant interband tunneling diodes comprise a plurality of substantially coherently strained layers including layers selected from a group consisting of silicon, germanium, and alloys of silicon and germanium, wherein at least one of said substantially coherently strained layers defines a barrier to non-resonant tunnel current. Some disclosed interband tunneling diodes comprise a plurality of substantially coherently strained layers, wherein at least one of said substantially coherently strained layers is tensile strained.

Abstract: A device includes: a first electrical contact; a second electrical contact; a semiconducting or semimetallic organic layer disposed at least partially between the first and second electrical contacts; and a tunneling barrier layer disposed at least partially between the semiconducting or semimetallic organic layer and the first electrical contact. The tunneling barrier layer has a thickness effective to enable flow of an electrical current through the tunneling barrier layer responsive to an operative electrical bias applied across the first and second electrical contacts, the electrical current exhibiting negative differential resistance for at least some applied electrical bias values. Circuits are also disclosed that utilize one or more negative differential resistance polymer diodes to implement logic, memory, or mixed signal applications.

Abstract: A device includes: a first electrical contact; a second electrical contact; a semiconducting or semimetallic organic layer disposed at least partially between the first and second electrical contacts; and a tunneling barrier layer disposed at least partially between the semiconducting or semimetallic organic layer and the first electrical contact. The tunneling barrier layer has a thickness effective to enable flow of an electrical current through the tunneling barrier layer responsive to an operative electrical bias applied across the first and second electrical contacts, the electrical current exhibiting negative differential resistance for at least some applied electrical bias values. Circuits are also disclosed that utilize one or more negative differential resistance polymer diodes to implement logic, memory, or mixed signal applications.

Abstract: Some disclosed interband tunneling diodes comprise a plurality of substantially coherently strained layers including layers selected from a group consisting of silicon, germanium, and alloys of silicon and germanium, wherein at least one of said substantially coherently strained layers is tensile strained. Some disclosed resonant interband tunneling diodes comprise a plurality of substantially coherently strained layers including layers selected from a group consisting of silicon, germanium, and alloys of silicon and germanium, wherein at least one of said substantially coherently strained layers defines a barrier to non-resonant tunnel current. Some disclosed interband tunneling diodes comprise a plurality of substantially coherently strained layers, wherein at least one of said substantially coherently strained layers is tensile strained.

Abstract: A Si-based diode (10, 10?, 100) is formed by epitaxially depositing a Si-based diode structure on a silicon substrate. The Si-based diode structure includes a Si-based pn junction (16, 16?, 18, 18?, 30, 32, 160, 161) having a backward diode current-voltage characteristic in which the forward tunneling current is substantially smaller than the backward tunneling current at comparable voltage levels. In some embodiments, the Si-based pn junction includes at least one non-silicon or silicon alloy layer such as at least one SiGe layer (16, 16?, 160, 161). In some embodiments, at least one delta doping (30, 32) is disposed on the silicon substrate in or near the pn junction, that together with the Si-based pn junction define an electrical junction having the backward diode current-voltage characteristic. A large area detector array may include a plurality of such Si-based diodes (10, 10?, 100).

Abstract: Interband tunnel diodes which are compatible with Si-based processes such as, but not limited to, CMOS and SiGe HBT fabrication. Interband tunnel diodes are disclosed (i) with spacer layers surrounding a tunnel barrier; (ii) with a quantum well adjacent to, but not necessarily in contact with, one of the injectors, and (iii) with a first quantum well adjacent to, but not necessarily in contact with, the bottom injector and a second quantum well adjacent to, but not necessarily in contact with, the top injector. Process parameters include temperature process for growth, deposition or conversion of the tunnel diode and subsequent thermal cycling which to improve device benchmarks such as peak current density and the peak-to-valley current ratio.

Abstract: A silicon-based interband tunneling diode (10, 110) includes a degenerate p-type doping (22, 130) of acceptors, a degenerate n-type doping (32, 118) of donors disposed on a first side of the degenerate p-type doping (22, 130), and a barrier silicon-germanium layer (20, 136) disposed on a second side of the degenerate p-type doping (22, 130) opposite the first side. The barrier silicon-germanium layer (20, 136) suppresses diffusion of acceptors away from a p/n junction defined by the degenerate p-type and n-type dopings (22, 32, 118, 130).

Abstract: The present invention provides a method for forming quantum tunneling devices comprising the steps of: (1) providing a quantum well, the quantum well comprising a composite material, the composite material comprising at least a first and a second material; and (2) processing the quantum well so as to form at least one segregated quantum tunneling structure encased within a shell comprised of a material arising from processing the composite material, wherein each segregated quantum structure is substantially comprised of the first material. The present invention also comprises additional methods of formation, quantum tunneling devices, said electronic devices.

Abstract: A method for forming a patterned layer of a light-emissive material on a substrate, comprising the steps of providing a holed layer on the surface of the substrate, the holed layer being permanently attached to the substrate and defining a plurality of holes through which the underlying substrate is exposed, and applying a light-emissive material to the surface of the holed layer opposite the substrate and displacing the light-emissive material in fluid form across the surface of the holed layer so as to selectively deposit the material only in the holes of the holed layer.

Abstract: Interband tunnel diodes which are compatible with Si-based processes such as, but not limited to, CMOS and SiGe HBT fabrication. Interband tunnel diodes are disclosed (i) with spacer layers surrounding a tunnel barrier; (ii) with a quantum well adjacent to, but not necessarily in contact with, one of the injectors, and (iii) with a first quantum well adjacent to, but not necessarily in contact with, the bottom injector and a second quantum well adjacent to, but not necessarily in contact with, the top injector. Process parameters include temperature process for growth, deposition or conversion of the tunnel diode and subsequent thermal cycling which to improve device benchmarks such as peak current density and the peak-to-valley current ratio.

Abstract: The present invention relates to a light-emitting device including a plurality of regions of phosphorescent material and a plurality of individually actuable regions of organic light-emitting material. The device is capable of emitting radiation of a wavelength that can excite the phosphoresce, each region of organic light-emitting material being arranged for emitting radiation to a respective region of phosphorescent material to cause phosphorescence of the material in that region.