Patents by Inventor Paul R. Emerald

Paul R. Emerald has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4256515
    Abstract: An integrated circuit includes MOS transistors and bipolar transistors, each of both polarity types, in a silicon wafer. High value polysilicon resistors are formed over an outer protective silicon dioxide layer of the silicon wafer, which resistors are rendered conductive by having ion implanted impurities concentrated near the outer surface of the polysilicon body, permitting achievement of close tolerance resistors. The process for making the integrated circuit includes forming a sheet of polysilicon over the entire wafer surface, performing the ion implantation and etching away all but the desired resistor portions of the polysilicon. It also includes heating the wafer to simultaneously anneal the ion implanted polysilicon, form the gate oxide, thicken the oxide over the emitters, and cover the resistor body with a thin protective oxide film.
    Type: Grant
    Filed: October 26, 1979
    Date of Patent: March 17, 1981
    Assignee: Sprague Electric Company
    Inventors: Steven W. Miles, Paul R. Emerald
  • Patent number: 4225877
    Abstract: An integrated circuit includes MOS transistors and bipolar transistors, each of both polarity types, in a silicon wafer. High value polysilicon resistors are formed over an outer protective silicon dioxide layer of the silicon wafer, which resistors are rendered conductive by having ion implanted impurities concentrated near the outer surface of the polysilicon body, permitting achievement of close tolerance resistors. The process for making the integrated circuit includes forming a sheet of polysilicon over the entire wafer surface, performing the ion implantation and etching away all but the desired resistor portions of the polysilicon. It also includes heating the wafer to simultaneously anneal the ion implanted polysilicon, form the gate oxide, thicken the oxide over the emitters, and cover the resistor body with a thin protective oxide film.
    Type: Grant
    Filed: September 5, 1978
    Date of Patent: September 30, 1980
    Assignee: Sprague Electric Company
    Inventors: Steven W. Miles, Paul R. Emerald