Patents by Inventor Paul R. Henneuse

Paul R. Henneuse has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5289136
    Abstract: A bipolar differential pair based transconductance element with improved linearity and signal to noise ratio is described. The circuit of the present invention comprises two sets of differential pairs of bipolar transistors in parallel. Each differential pair implements transistor area ratios in the emitter areas. The present invention also comprises diodes that are coupled to the emitters of the transistors of the differential pairs. When the device areas are ratioed properly, the range for the input voltage signal that still allows a linear output current equation increases by a factor of 2 over prior art circuits. The improved linearity, as well as improved signal-to-noise ratio, is achieved by coupling the diodes to the emitters of the transistors and also having the differential pairs in parallel with their transistor areas proportional to each other. An alternative embodiment of the present invention is also described which also uses a level shifting stage.
    Type: Grant
    Filed: December 28, 1992
    Date of Patent: February 22, 1994
    Assignee: Silicon Systems, Inc.
    Inventors: Geert A. DeVeirman, Paul R. Henneuse
  • Patent number: 4285051
    Abstract: An improved analog track and hold circuit has a glitch-free output as the circuit switches between the tracking and the holding of an input analog signal. The circuit is of the type having a capacitor for storing an analog voltage, a transconductance amplifier for producing a charging current for the capacitor proportional to the analog voltage, a current switch for connecting and disconnecting the charging current for the capacitor, and an output circuit to buffer the capacitor voltage to the output. The improvement includes a diode array establishing first and second reference nodes across the capacitor. The diodes in the array clamp the first and second nodes to fixed incremental voltage values greater and lesser, respectively, than the capacitor voltage as the circuit tracks the analog voltage, and to fixed incremental voltage values lesser and greater, respectively, than the capacitor voltage, as the circuit holds the analog voltage.
    Type: Grant
    Filed: February 29, 1980
    Date of Patent: August 18, 1981
    Assignee: Precision Monolithics, Inc.
    Inventor: Paul R. Henneuse