Abstract: A system is disclosed in which a single tool-independent model of a circuit design is used to generate a plurality of tool-specific circuit models suitable for use with a plurality of target tools, such as Automatic Test Pattern Generation (ATPG) tools and/or equivalence tools. A plurality of circuit block class definitions provide abstract interfaces to a plurality of circuit block classes. Each circuit block class definition includes a plurality of tool-specific models of the corresponding circuit block class. The tool-independent circuit model models at least some of the blocks in the circuit design by reference to the circuit block class definitions. A circuit model processor generates a tool-specific circuit model by replacing tool-independent block models in the tool-independent circuit model with corresponding tool-specific block models suitable for use with a particular one of the target tools.

Abstract: A Multiply Accumulate unit, which may be an FMAC for IEEE 754 format numbers, finds A*B±C faster if the multiplier is allowed to assume that it's A and B inputs are always positive, so that it never has to provide a complemented output, and if the C input for the accumulation with the product is also assumed to be positive. The sign magnitude notation of the IEEE 754 format is temporarily exchanged for a positive two's complement notation of the assumed positive values. Notice is taken of the actual signs, and when there is a difference to be formed, either because of addition between numbers having opposite signs, or because of a subtraction between numbers having the same sign, one of the numbers need to be negated (complemented) prior to the addition of C and the product AB. That number can always be C, provided that correct compensatory negation is available after the addition.