Abstract: A receiver architecture is disclosed for use in Time-Division Multiple Access (TDMA) and related digital radio applications which combines the principal benefits of the conventional hard-limiting and linear receiver architectures to support switched-antenna diversity and multipath equalisation without the need for receiver gain control. A further feature of the receiver architecture is that minimises the dynamic range needed by the digital signal processing stages thereby reducing complexity, power consumption and cost compared to known arrangements. The (TDMA) radio frequency signal is separated into two components by the analogue section of the receiver: one component characterising the signal's phase, either absolute or differential, the second component characterising the signal's instantaneous magnitude. The (constant-envelope) phase component is digitised by an analogue-to-digital converter (ADC) to form a sequence of phase samples.

Abstract: A receiver architecture is disclosed for use in Time-Division Multiple Access (TDMA) and related digital radio applications which combines the principal benefits of the conventional hard-limiting and linear receiver architectures to support switched-antenna diversity and multipath equalisation without the need for receiver gain control. A further feature of the receiver architecture is that minimises the dynamic range needed by the digital signal processing stages thereby reducing complexity, power consumption and cost compared to known arrangements. The (TDMA) radio frequency signal is separated into two components by the analogue section of the receiver: one component characterising the signal's phase, either absolute or differential, the second component characterising the signal's instantaneous magnitude. The (constant-envelope) phase component is digitised by an analogue-to-digital converter (ADC) to form a sequence of phase samples.