Patents by Inventor Paul S. Gryskiewicz

Paul S. Gryskiewicz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7372505
    Abstract: A video controller may include at least one video input port which may be programmably configured to receive either RGB or non-RGB color space signals. The video controller may programmably operate in either an RGB or non-RGB mode. In this way, the number of color space conversions may be reduced in some embodiments. For example, where a television output device is coupled to the video controller, the video controller may provide a non-RGB output signal.
    Type: Grant
    Filed: December 3, 2004
    Date of Patent: May 13, 2008
    Assignee: Intel Corporation
    Inventor: Paul S. Gryskiewicz
  • Patent number: 6937291
    Abstract: An adaptive filter is adjustable for performing scaling operations. During a scaling operation, the adaptive filter stores scaled data in a memory such that more data samples may be retrieved during a subsequent scaling operation. The size of a finite impulse response filter used during the subsequent scaling operation may be adjusted to access the additional data samples.
    Type: Grant
    Filed: August 31, 2000
    Date of Patent: August 30, 2005
    Assignee: Intel Corporation
    Inventor: Paul S. Gryskiewicz
  • Patent number: 6839093
    Abstract: A video controller may include at least one video input port which may be programmably configured to receive either RGB or non-RGB color space signals. The video controller may programmably operate in either an RGB or non-RGB mode. In this way, the number of color space conversions may be reduced in some embodiments. For example, where a television output device is coupled to the video controller, the video controller may provide a non-RGB output signal.
    Type: Grant
    Filed: November 13, 1998
    Date of Patent: January 4, 2005
    Assignee: Intel Corporation
    Inventor: Paul S. Gryskiewicz
  • Patent number: 6646686
    Abstract: Alpha values associated with video mixing operations are sent to a memory on a low pin count bus. The memory is accessible to a video mixer, which retrieves the alpha values to perform a mixing operation. The alpha values for a field are sent to the memory during the field time for a previous field rather than during the vertical blanking interval. The alpha values may be compressed prior to transmission.
    Type: Grant
    Filed: September 21, 2000
    Date of Patent: November 11, 2003
    Assignee: Intel Corporation
    Inventors: Paul S. Gryskiewicz, Aniruddha P. Joshi
  • Patent number: 6573946
    Abstract: Two independent visually displayable data streams may be synchronized in real-time. One data stream may be converted to look like the other data stream prior to mixing the two data streams together. One data stream is buffered while the other data stream is converted. A memory buffer is used to synchronize the two data streams.
    Type: Grant
    Filed: August 31, 2000
    Date of Patent: June 3, 2003
    Assignee: Intel Corporation
    Inventor: Paul S. Gryskiewicz
  • Patent number: 6545724
    Abstract: Text and graphics elements may be alpha blended in a way to reduce flicker when the text or graphics are display by a processor-based television receiver. The alpha values are used to intelligently smooth pixels adjacent the element to create television text and graphics.
    Type: Grant
    Filed: October 29, 1999
    Date of Patent: April 8, 2003
    Assignee: Intel Corporation
    Inventor: Paul S. Gryskiewicz
  • Publication number: 20020129050
    Abstract: A way of displaying video in an application is described. An apparatus is provided that comprises an interface to receive video. The apparatus further comprises a controller to display at least one object. The controller is further provided to display the video, wherein a position of the at least one object is adjusted in response to displaying the video.
    Type: Application
    Filed: March 9, 2001
    Publication date: September 12, 2002
    Inventor: Paul S. Gryskiewicz
  • Patent number: 6421785
    Abstract: A circuit to provide one clock signal from a plurality of possible clock signals includes a register to receive indication of a data sampling frequency, a selection circuit operatively coupled to the register, the indicated data sampling frequency selecting one of a plurality of signals provided to the selection circuit, and a modification circuit to modify the selected signal based at least in part on the indicated sampling frequency. A method to automatically and dynamically provide one clock signal from a plurality of possible clock signals includes receiving a signal indicating a data sampling frequency, selecting one clock signal from a plurality of input clock signals based on the received data sampling frequency indication, and modifying the selected clock signal, based on the indicated sampling frequency, to generate an output clock signal.
    Type: Grant
    Filed: November 3, 1998
    Date of Patent: July 16, 2002
    Assignee: Intel Corporation
    Inventors: Paul S. Gryskiewicz, Karl H. Mauritz
  • Publication number: 20020069074
    Abstract: A method to combine diversely encoded data streams includes receiving a first data stream in a first encoded format, decoding the first data stream into a decoded format, obtaining a second data stream in the decoded format, and combining the decoded first data stream with the second data stream. The first encoded format may, for example, be associated with a video data stream, an audio data stream, or a multimedia data stream. The decoded format may be any format which allows two data streams to be combined in a substantially direct manner such as, for example, a linear pulse code modulated (LPCM) data format.
    Type: Application
    Filed: November 3, 1998
    Publication date: June 6, 2002
    Inventors: MARK E. EIDSON, KARL H MAURITZ, PAUL S. GRYSKIEWICZ
  • Patent number: 6392712
    Abstract: An interlaced video signal may be combined with a progressive video signal, such as a graphics signal, by converting the interlaced video signal into a progressive signal. A new frame of the converted progressive signal is constructed from each field of the interlaced signal. The graphics signal is interlaced, then combined with the converted progressive signal. The combined signals may then be transmitted to a display, such as a television set. The interlaced video signal, which is transmitted at twice its incoming speed, remains temporally correct so that operations, such as scaling and 3:2 pulldown, may be performed with minimal resulting artifacts. The small amount of memory used to combine the signals may be embedded in the receiver circuitry.
    Type: Grant
    Filed: March 31, 2000
    Date of Patent: May 21, 2002
    Assignee: Intel Corporation
    Inventors: Paul S. Gryskiewicz, Pranav H. Mehta
  • Patent number: RE39214
    Abstract: Text and graphics elements may be alpha blended in a way to reduce flicker when the text or graphics are display by a processor-based television receiver. The alpha values are used to intelligently smooth pixels adjacent the element to create television text and graphics.
    Type: Grant
    Filed: December 19, 2003
    Date of Patent: August 1, 2006
    Assignee: Intel Corporation
    Inventor: Paul S. Gryskiewicz