Abstract: A semiconductor die having: a logic unit having a plurality of inputs/outputs; a plurality of pads whereby electrical connections can be made to the die; and a multiplexer arranged between the inputs/outputs and the pads, the multiplexer being operable in a first mode in which it maps a first number of the inputs/outputs to a first number of the pads with a first mean spacing between those pads, and a second mode in which it maps a second number of the inputs/outputs to a first number of the pads with a second mean spacing between those pads, wherein the first number is larger than the second number and the first spacing is smaller than the second spacing.

Abstract: An integrated circuit has registers which it can place in a low power condition in which their state is lost; a power domain capable of reading the registers, the current operating mode of the domain being dependent on the state of the registers; a memory; and a configuration controller for configuring the registers. The configuration controller has access to a set of mappings. Each mapping indicates for bits represented in the memory the state of other bits storable in the registers. The configuration controller is configured to perform a register configuration operation by reading bits from the memory and populating the registers with a corresponding bit state.

Abstract: A semiconductor die having: a logic unit having a plurality of inputs/outputs; a plurality of pads whereby electrical connections can be made to the die; and a multiplexer arranged between the inputs/outputs and the pads, the multiplexer being operable in a first mode in which it maps a first number of the inputs/outputs to a first number of the pads with a first mean spacing between those pads, and a second mode in which it maps a second number of the inputs/outputs to a first number of the pads with a second mean spacing between those pads, wherein the first number is larger than the second number and the first spacing is smaller than the second spacing.

Abstract: An integrated circuit has registers which it can place in a low power condition in which their state is lost; a power domain capable of reading the registers, the current operating mode of the domain being dependent on the state of the registers; a memory; and a configuration controller for configuring the registers. The configuration controller has access to a set of mappings. Each mapping indicates for bits represented in the memory the state of other bits storable in the registers. The configuration controller is configured to perform a register configuration operation by reading bits from the memory and populating the registers with a corresponding bit state.