Abstract: This application relates to computing circuitry (200, 500, 600) for analogue computing. A plurality of current generators (201) are each configured to generate a defined current (ID1, ID2, . . . IDj) based on a respective input data value (D1, D2, . . . Dj). A memory array (202), having at least one set (204) of programmable-resistance memory cells (203), is arranged to receive the defined currents from each of the current generators at a respective signal line (206). Each set (204) of programmable-resistance memory cells (203) includes a memory cell associated with each signal line that, in use, can be connected between the relevant signal line and a reference voltage so as to generate a voltage on the signal line. An adder module (207) is coupled to each of the signal lines to generate a voltage at an output node (210) based on the sum of the voltages on each of the signal lines.

Abstract: A percutaneous access device comprises a frame, a hatch and a hinge that couples the frame to the hatch. The frame has a passageway that extends therethrough. When the percutaneous access device is implanted in a patient, the frame is positioned beneath a layer of skin of the patient against a bodily vessel. Moreover, the hinge biases the hatch closed against the frame in a normally closed position such that liquid flowing through a lumen of the vessel cannot escape through the percutaneous access device. However, the application of force against the hatch from an object (such as a needle) that extends through the passageway causes the hatch to open outwardly from the frame and into the lumen of the vessel. Correspondingly, the hinge biases the hatch back to the normally closed position upon removal of the object.

Abstract: This application relates to computing circuitry (200, 500, 600) for analogue computing. A plurality of current generators (201) are each configured to generate a defined current (ID1, ID2, . . . IDj) based on a respective input data value (D1, D2, . . . Dj). A memory array (202), having at least one set (204) of programmable-resistance memory cells (203), is arranged to receive the defined currents from each of the current generators at a respective signal line (206). Each set (204) of programmable-resistance memory cells (203) includes a memory cell associated with each signal line that, in use, can be connected between the relevant signal line and a reference voltage so as to generate a voltage on the signal line. An adder module (207) is coupled to each of the signal lines to generate a voltage at an output node (210) based on the sum of the voltages on each of the signal lines.

Abstract: This application relates to analog-to-digital converter (ADC) circuitry (200). A time-encoding modulator (TEM 201) has a comparator (104) and a loop filter (105) configured to generate a pulse-width-modulated (PWM) signal (SPWM) in response to an input signal (SIN) and a feedback signal (SFB). A controlled oscillator, such as a VCO (202) receives the PWM signal and generates an output oscillation signal (SOSC) with a frequency that varies based on a drive signal at a drive node (109), e.g. a drive node of a ring oscillator (107). The controlled oscillator (202) comprises at least one control switch (112) controlled by a switch control signal (S1) generated from the received PWM signal so as to control the drive strength of the drive signal applied to the drive node (109). The feedback signal (SFB) for the TEM (201) is derived from the controlled oscillator (202) so as to include any timing error between the PWM signal and the switch control signal (S1) applied to said control switch.

Abstract: This application relates time-encoding modulators such as may be used as part of analogue-to-digital conversion. A time-encoding modulator (100) receives an analogue input signal (SIN) at an input node (102) and outputs a corresponding time-encoded signal (SOUT) at an output node (103). A hysteretic comparator (101) has a first comparator input connected to the input node and a comparator output connected to the output node. A feedback path extends between the output node and a second comparator input of the hysteretic comparator; with a filter arrangement (104) arranged to apply filtering to the feedback path. The hysteretic comparator (101) compares the input signal (SIN) to the feedback signal (SFB) with hysteresis. This provides a pulse-width modulated output signal (SOUT) where the duty cycle encodes the input signal (SIN).

Abstract: This application relates to methods and apparatus for voltage regulation. Embodiments relate to signal processing circuit (300) having a first and second processing path with respective first and second inputs (INP and INN). The first and second processing paths have respective first and second virtual earth nodes (108P and 108N) at the input to a differential integrator (106). A differential feedback path is configured to apply a feedback signal to each of the first and second virtual earth nodes so as to minimize any voltage difference between them. A regulator (301) is operable to monitor a voltage at one of the virtual earth nodes (108P) against a reference voltage (VREF) and to generate a regulation signal to maintain the voltage at said monitored one of the first and second virtual earth nodes to be equal to the reference voltage. The regulation signal is applied to both of the first and second virtual earth nodes.

Abstract: This application relates time-encoding modulators such as may be used as part of analogue-to-digital conversion. A time-encoding modulator (100) receives an analogue input signal (SIN) at an input node (102) and outputs a corresponding time-encoded signal (SOUT) at an output node (103). A hysteretic comparator (101) has a first comparator input connected to the input node and a comparator output connected to the output node. A feedback path extends between the output node and a second comparator input of the hysteretic comparator; with a filter arrangement (104) arranged to apply filtering to the feedback path. The hysteretic comparator (101) compares the input signal (SIN) to the feedback signal (SFB) with hysteresis. This provides a pulse-width modulated output signal (SOUT) where the duty cycle encodes the input signal (SIN).

Abstract: This device opens hotel entry doors, when the electronic card key lock malfunctions. Its intended use is to gain immediate entry (without damage) when card keys are lost, during medical emergencies, when lithium batteries are dead, and will not take a charge from an external device, or when the lock mechanically malfunctions. Or when drilling out an expensive lock, only to replace it with another expensive lock, or drilling on a hotel entry door lock @ midnight, or three in the morning is not an option. Also works on service doors.

Abstract: A dual sleeved sock is provided as a sock having two cuffs. One cuff remains on the wearer's leg in a normal fashion, while the other cuff folds down over the wearer's boots.

Abstract: A unique package for inoculants and a method for enabling the end user to introduce a pure culture of a microorganism into its appropriate growth substance, and later the microorganism enriched substance into a carrier material within a self-contained unit. The basic package separates a stabilized pure culture of the microorganism from the growth substance by a clamp which forms a physical partition. The microorganism is introduced to the substance when the partition is eliminated. After a time of growth to a maximum extent possible in the substance, the package is fractured to release the fresh inoculation at maximum microorganism vitality. Growth of the microorganism in the growth substance in-situ results in maximum numbers of the beneficial microorganism being available at the site of application.