Abstract: A fuel/air supply device including a fuel supply arrangement designed to convey fuel to a fuel outlet of the fuel/air supply device, a primary air supply arrangement designed to convey air to an air outlet of the fuel/air supply device, and a secondary air supply arrangement connecting the primary air supply arrangement to the fuel supply arrangement at a position upstream of a fuel compressor that is included in the fuel supply arrangement. The secondary air supply arrangement includes an air conduit that has a restricted portion for defining a relatively small air passage in the air conduit, and can be used for realizing a fuel/air mixture of low calorific value if so desired on the basis of a supply of air to the fuel without needing complex control measures.

Abstract: A fuel/air supply device including a fuel supply arrangement designed to convey fuel to a fuel outlet of the fuel/air supply device, a primary air supply arrangement designed to convey air to an air outlet of the fuel/air supply device, and a secondary air supply arrangement connecting the primary air supply arrangement to the fuel supply arrangement at a position upstream of a fuel compressor that is included in the fuel supply arrangement. The secondary air supply arrangement includes an air conduit that has a restricted portion for defining a relatively small air passage in the air conduit, and can be used for realizing a fuel/air mixture of low calorific value if so desired on the basis of a supply of air to the fuel without needing complex control measures.

Abstract: A branch prediction unit BPU (500) for prediction of a next taken branch instruction in a processing unit (100). The BPU (500) comprises a pattern history memory (504) comprising branch source addresses and branch indicators; a branch target buffer (506) comprising branch targets; and branch prediction logical circuit (502). By means of a search PC, the circuit finds in the memory a branch indicator indicating a predicted taken branch instruction. The circuit selects a first found branch indicator as an indication of a first predicted taken branch instruction. Using the first found branch indicator, the circuit retrieves from the memory, a branch source address of the first predicted taken branch instruction. When the retrieved branch source address is the branch source address nearest to the search PC, the circuit outputs as next PC a branch target retrieved from the buffer. Then the prediction stops.

Abstract: An intermediate symbol buffer (ISB) configuration and method is provided such that the ISB memory comprises 15 portions, one for each HSDPA spreading code. Symbols associated with a spreading code are written to the memory portion associated with the same spreading code. When a covariance calculation is performed to obtain a more accurate channel estimate, only the symbols associated with spreading codes determined to be needed for the covariance calculation are written to the ISB by a buffer block and red from the ISB by a correlation core. The symbols associated with spreading codes that are not necessary for a covariance calculation may be masked from being written or read from the ISB. In some embodiments each memory portion is an individual memory block. In other embodiments a plurality of memory blocks may contain a plurality of memory portions, one memory partition designated, at least temporarily, for each spreading code.

Abstract: A branch prediction unit BPU (500) for prediction of a next taken branch instruction in a processing unit (100). The BPU (500) comprises a pattern history memory (504) comprising branch source addresses and branch indicators; a branch target buffer (506) comprising branch targets; and branch prediction logical circuit (502). By means of a search PC, the circuit finds in the memory a branch indicator indicating a predicted taken branch instruction. The circuit selects a first found branch indicator as an indication of a first predicted taken branch instruction. Using the first found branch indicator, the circuit retrieves from the memory, a branch source address of the first predicted taken branch instruction. When the retrieved branch source address is the branch source address nearest to the search PC, the circuit outputs as next PC a branch target retrieved from the buffer. Then the prediction stops.

Abstract: An intermediate symbol buffer (ISB) configuration and method is provided such that the ISB memory comprises 15 portions, one for each HSDPA spreading code. Symbols associated with a spreading code are written to the memory portion associated with the same spreading code. When a covariance calculation is performed to obtain a more accurate channel estimate, only the symbols associated with spreading codes determined to be needed for the covariance calculation are written to the ISB by a buffer block and red from the ISB by a correlation core. The symbols associated with spreading codes that are not necessary for a covariance calculation may be masked from being written or read from the ISB. In some embodiments each memory portion is an individual memory block. In other embodiments a plurality of memory blocks may contain a plurality of memory portions, one memory partition designated, at least temporarily, for each spreading code.