Patents by Inventor Paul Southworth

Paul Southworth has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250038138
    Abstract: A method of manufacturing a semiconductor device is provided. The method includes forming a first non-conductive layer over a top side a semiconductor die and patterning the first non-conductive layer to form a collar structure surrounding an opening exposing a top surface of a bond pad. A second non-conductive layer is formed over the first non-conductive layer and exposed portions of the top side of the semiconductor die. The second non-conductive layer is different from the first non-conductive layer. The second non-conductive layer is patterned to expose the top surface of the bond pad and inner sidewalls of the of the collar structure surrounding the opening such that the second non-conductive layer does not contact the bond pad. A metal redistribution layer is formed over the second non-conductive layer and exposed top surface of the bond pad.
    Type: Application
    Filed: July 27, 2023
    Publication date: January 30, 2025
    Inventors: Ting Hsun Tu, Paul Southworth, Che Ming Fang
  • Publication number: 20240413192
    Abstract: A semiconductor device may include a semiconductor substrate and an isolation structure including a first dielectric layer formed over the semiconductor substrate, the first dielectric layer including one or more air gaps, and a first conductive structure formed on the dielectric layer, the conductive structure having a lower surface that faces the semiconductor substrate. Respective air gaps of the one or more air gaps of the first dielectric layer each may be disposed directly between corners of the lower surface of the conductive structure and the semiconductor substrate.
    Type: Application
    Filed: June 6, 2023
    Publication date: December 12, 2024
    Inventors: Paul Southworth, Michiel van Soestbergen, Amar Ashok Mavinkurve, Wen Yuan Chuang, Michael B. Vincent
  • Patent number: 12119316
    Abstract: An electronic device substrate with a substantially planar surface formed from an electrically non-conductive material is provided with one or more metalized pads on the substantially planner surface. Each of the one or more metalized pads is surrounded by and coplanar with the first electrically nonconductive material along an outer boundary of the metalized pad. The metalized pad is patterned such that portions of the metalized pad form metalized fingers that extend radially from the outer boundary of the metalized pad in an interdigitated arrangement with the first electrically nonconductive material. The metalized pad has a solderable surface.
    Type: Grant
    Filed: May 19, 2022
    Date of Patent: October 15, 2024
    Assignee: NXP USA, Inc.
    Inventors: Namrata Kanth, Paul Southworth, Scott M. Hayes, Dwight Lee Daniels, Yufu Liu, Jeroen Johannes Maria Zaal, Cheong Chiang Ng
  • Publication number: 20230378106
    Abstract: An electronic device substrate with a substantially planar surface formed from an electrically non-conductive material is provided with one or more metalized pads on the substantially planner surface. Each of the one or more metalized pads is surrounded by and coplanar with the first electrically nonconductive material along an outer boundary of the metalized pad. The metalized pad is patterned such that portions of the metalized pad form metalized fingers that extend radially from the outer boundary of the metalized pad in an interdigitated arrangement with the first electrically nonconductive material. The metalized pad has a solderable surface.
    Type: Application
    Filed: May 19, 2022
    Publication date: November 23, 2023
    Inventors: Namrata Kanth, Paul Southworth, Scott M. Hayes, Dwight Lee Daniels, Yufu Liu, Jeroen Johannes Maria Zaal, Cheong Chiang Ng
  • Patent number: 10937750
    Abstract: Embodiments are provided for package semiconductor devices, each device including: a low stress pad structure comprising: a dielectric layer, a seed layer having: a center section, and a ring section formed around the center section and over a top surface of the dielectric layer, wherein the ring section of the seed layer includes a set of elongated openings through which a portion of the top surface of the dielectric layer is exposed, and a metal layer having: an inner section formed over a top surface of the center section of the seed layer, and an outer section formed over a top surface of the ring section of the seed layer, wherein a bottom surface of the outer section of the metal layer directly contacts the portion of the top surface of the dielectric layer exposed through the set of elongated openings.
    Type: Grant
    Filed: August 14, 2019
    Date of Patent: March 2, 2021
    Assignee: NXP B.V.
    Inventors: Paul Southworth, Zhiwei Gong
  • Publication number: 20210050317
    Abstract: Embodiments are provided for package semiconductor devices, each device including: a low stress pad structure comprising: a dielectric layer, a seed layer having: a center section, and a ring section formed around the center section and over a top surface of the dielectric layer, wherein the ring section of the seed layer includes a set of elongated openings through which a portion of the top surface of the dielectric layer is exposed, and a metal layer having: an inner section formed over a top surface of the center section of the seed layer, and an outer section formed over a top surface of the ring section of the seed layer, wherein a bottom surface of the outer section of the metal layer directly contacts the portion of the top surface of the dielectric layer exposed through the set of elongated openings.
    Type: Application
    Filed: August 14, 2019
    Publication date: February 18, 2021
    Inventors: Paul Southworth, Zhiwei Gong
  • Patent number: 10593635
    Abstract: Embodiments are provided for a multi-die packaged semiconductor device including: a panel of embedded dies including a plurality of radio frequency (RF) dies, wherein each RF die includes RF front-end circuitry, each RF die has an active side that includes a plurality of pads, each RF die has a back side exposed in a back side of the panel; a plurality of antenna connectors formed on a subset of the plurality of pads of each RF die; and an array of antennas formed over a front side of the panel and connected to the plurality of antenna connectors.
    Type: Grant
    Filed: March 27, 2018
    Date of Patent: March 17, 2020
    Assignee: NXP B.V.
    Inventors: Antonius Hendrikus Jozef Kamphuis, Paul Southworth, Keith Richard Sarault, Marcellinus Johannes Maria Geurts, Jeroen Johannes Maria Zaal, Johannes Henricus Johanna Janssen, Amar Ashok Mavinkurve
  • Publication number: 20190304934
    Abstract: Embodiments are provided for a multi-die packaged semiconductor device including: a panel of embedded dies including a plurality of radio frequency (RF) dies, wherein each RF die includes RF front-end circuitry, each RF die has an active side that includes a plurality of pads, each RF die has a back side exposed in a back side of the panel; a plurality of antenna connectors formed on a subset of the plurality of pads of each RF die; and an array of antennas formed over a front side of the panel and connected to the plurality of antenna connectors.
    Type: Application
    Filed: March 27, 2018
    Publication date: October 3, 2019
    Inventors: Antonius Hendrikus Jozef KAMPHUIS, Paul SOUTHWORTH, Keith Richard SARAULT, Marcellinus Johannes Maria GEURTS, Jeroen Johannes Maria ZAAL, Johannes Henricus Johanna JANSSEN, Amar Ashok MAVINKURVE
  • Patent number: 5854495
    Abstract: A structure is disclosed for growing semiconductor surfaces. A substrate such as a single crystal silicon substrate is treated by electrical biasing in the presence of a carbon-containing plasma to cause nucleation of the surface. By direct observation using atomic force microscopy (AFM), a nucleated surface consisting of a thin film of mutually parallel, quadrilateral carbon-containing platelets was seen to develop on the substrate. An optimum nucleated surface was determined to be substantially covered with such platelets whose slope relative to the substrate was less than 5.degree.. Such a surface can serve as a template for growing semiconductor films, particularly of diamond, of well defined structure.
    Type: Grant
    Filed: March 26, 1996
    Date of Patent: December 29, 1998
    Assignee: Kobe Steel Europe Limited
    Inventors: David Buhaenko, Peter John Ellis, Paul Southworth, Carolyn Elizabeth Beer
  • Patent number: 5471947
    Abstract: A method is disclosed for producing an oriented diamond film on a single crystal silicon substrate which comprises preconditioning the surface of the substrate by exposing the surface of the substrate to a carbon-containing plasma, subjecting the preconditioned surface to electrical bias to effect nucleation of the substrate surface for oriented diamond crystal growth while monitoring the completion of nucleation over the surface of the substrate and depositing crystalline diamond on the nucleated surface from a carbon-containing plasma. The resulting structure comprises a crystalline diamond film on the silicon substrate characterised by oriented columnar diamond crystals which form a substantially uniform tessellated pattern. In practice, the columnar crystals normally have a generally quadrilateral shape whose sides are mutually aligned.
    Type: Grant
    Filed: August 19, 1993
    Date of Patent: December 5, 1995
    Assignee: Kabushiki Kaisha Kobe Seiko Sho
    Inventors: Paul Southworth, David S. Buhaenko, Peter J. Ellis, Carolyn E. Jenkins, Brian R. Stoner