Patents by Inventor Paul Stanton

Paul Stanton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240070131
    Abstract: A database image may be updated with incremental changes without replicating the production database. Each set of changes to the production database are stored in a differencing disk. Two or more identical chains of differencing disks are created. One chain is an active chain, and database clones may be served from the active chain for use by users. After reaching a predetermined length on an inactive chain, the differencing disks on the inactive chain are merged into a single merged differencing disk, and the inactive chain becomes an active chain, from which new database clones may be served to users. The chains may alternate between being inactive and active chains.
    Type: Application
    Filed: November 9, 2023
    Publication date: February 29, 2024
    Inventors: Paul Stanton, Ramesh Parameswaran
  • Patent number: 11853276
    Abstract: A database image may be updated with incremental changes without replicating the production database. Each set of changes to the production database are stored in a differencing disk. Two or more identical chains of differencing disks are created. One chain is an active chain, and database clones may be served from the active chain for use by users. After reaching a predetermined length on an inactive chain, the differencing disks on the inactive chain are merged into a single merged differencing disk, and the inactive chain becomes an active chain, from which new database clones may be served to users. The chains may alternate between being inactive and active chains.
    Type: Grant
    Filed: January 6, 2021
    Date of Patent: December 26, 2023
    Assignee: Nirvaha Corporation
    Inventors: Paul Stanton, Ramesh Parameswaran
  • Publication number: 20210209078
    Abstract: A database image may be updated with incremental changes without replicating the production database. Each set of changes to the production database are stored in a differencing disk. Two or more identical chains of differencing disks are created. One chain is an active chain, and database clones may be served from the active chain for use by users. After reaching a predetermined length on an inactive chain, the differencing disks on the inactive chain are merged into a single merged differencing disk, and the inactive chain becomes an active chain, from which new database clones may be served to users. The chains may alternate between being inactive and active chains.
    Type: Application
    Filed: January 6, 2021
    Publication date: July 8, 2021
    Inventors: Paul Stanton, Ramesh Parameswaran
  • Patent number: 10255070
    Abstract: Global synchrony changes the way computers can be programmed. A new class of ISA level instructions (the globally-synchronous load-store) of the present invention is presented. In the context of multiple load-store machines, the globally synchronous load-store architecture allows the programmer to think about a collection of independent load-store machines as a single load-store machine. These ISA instructions may be applied to a distributed matrix transpose or other data that exhibit a high degree of data non-locality and difficulty in efficiently parallelizing on modern computer system architectures. Included in the new ISA instructions are a setup instruction and a synchronous coalescing access instruction (“sca”). The setup instruction configures a head processor to set up a global map that corresponds processor data contiguously to the memory. The “sca” instruction configures processors to block processor threads until respective times on a global clock, derived from the global map, to access the memory.
    Type: Grant
    Filed: September 4, 2014
    Date of Patent: April 9, 2019
    Assignee: Massachusetts Institute of Technology
    Inventors: David Joseph Whelihan, Paul Stanton Keltcher
  • Publication number: 20170300330
    Abstract: Global synchrony changes the way computers can be programmed. A new class of ISA level instructions (the globally-synchronous load-store) of the present invention is presented. In the context of multiple load-store machines, the globally synchronous load-store architecture allows the programmer to think about a collection of independent load-store machines as a single load-store machine. These ISA instructions may be applied to a distributed matrix transpose or other data that exhibit a high degree of data non-locality and difficulty in efficiently parallelizing on modern computer system architectures. Included in the new ISA instructions are a setup instruction and a synchronous coalescing access instruction (“sca”). The setup instruction configures a head processor to set up a global map that corresponds processor data contiguously to the memory. The “sca” instruction configures processors to block processor threads until respective times on a global clock, derived from the global map, to access the memory.
    Type: Application
    Filed: September 4, 2014
    Publication date: October 19, 2017
    Inventors: David Joseph Whelihan, Paul Stanton Keltcher
  • Publication number: 20050117974
    Abstract: There is provided a buoyancy system for a structure having at least one component being substantially stationary with respect to the bottom of a water covered area. The system comprises a set of buoyancy modules of engineered materials to apply an identified amount of buoyancy. The set of buoyancy modules is attached to the structure at a set of buoyancy load transfer locations. The set of buoyancy modules comprises layers of the engineered materials. The engineered materials comprise a substantially reinforced axial layer, a substantially reinforced hoop layer; and a leak prevention layer.
    Type: Application
    Filed: January 5, 2005
    Publication date: June 2, 2005
    Applicant: TECHNIP FRANCE
    Inventors: Metin Karayaka, Paul Stanton
  • Patent number: 6779100
    Abstract: A computer system for storing corresponding instruction blocks in a compressed form in a main memory and in an uncompressed form in an instruction cache. The instruction cache line addresses for the uncompressed instruction blocks in the instruction cache have an algebraic correlation to the main memory line addresses for the compressed instruction blocks in the main memory. Preferably, the instruction cache line addresses are proportional to the corresponding main memory line addresses.
    Type: Grant
    Filed: December 17, 1999
    Date of Patent: August 17, 2004
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Paul Stanton Keltcher, Stephen Eric Richardson
  • Patent number: 5404930
    Abstract: An improved mold for use in casting a metal airfoil has an airfoil mold cavity and a starter chamber. A lower end of the starter chamber is formed by a chill plate. A filter is disposed in the starter chamber between the airfoil mold cavity and the chill plate. When an airfoil is to be cast, molten metal is conducted into the starter chamber, into passages in the filter and into the airfoil mold cavity. The molten metal is solidified upward in the starter chamber from the chill plate and through the passages in the filter. The filter blocks migration of impurities from the starter chamber to the airfoil mold cavity as the metal solidifies in the starter chamber. As the molten metal begins to solidify in the airfoil mold cavity, the molten metal is solidified as a large number of columnar grain crystals which extend from the passages in the filter into the airfoil mold cavity.
    Type: Grant
    Filed: January 6, 1994
    Date of Patent: April 11, 1995
    Assignee: PCC Airfoils, Inc.
    Inventors: Paul Stanton, Louis H. Monte