Abstract: A method for countervailing clock skew between a first clock signal and a second clock signal in a core logic circuit. The second clock signal is sampled based on the first clock signal in a sampling cycle to obtain a sampling result. When the sampling result indicates a non-compliant pattern, the phase of at least one of the first clock signal and the second clock signal is adjusted. Desirably, the core logic circuit keeps on working with the current first and second clock signals while continuing the sampling procedure of the second clock signal based on the first clock signal when the sampling result indicates a compliant pattern.

Abstract: A combined plug and sealing ring for a sprinkler nozzle includes a nozzle plug having a substantially cylindrical portion adapted to engage within a nozzle orifice of a sprinkler nozzle, and a cap overlaying the substantially cylindrical portion. A sealing ring is adapted to seat onto a threaded pipe fitting portion of the sprinkler nozzle. A leash interconnects the nozzle plug and the sealing ring. A combined plug and sealing ring in combination with a sprinkler nozzle, and a method of installing a sprinkler nozzle in a highly corrosive or extremely corrosive environment are also disclosed.

Abstract: A frame of a sprinkler or nozzle for use in a corrosive service environment. The frame includes a corrosion resistant metal having a passive oxide film that is chemically stable in the service environment. Alternatively, the frame includes a polymer that is inert in the service environment.

Abstract: A power control device includes a comparison unit, a control unit and a switch unit. The comparison unit electrically connects to a first power rail and a second power rail, respectively, and generates a comparing signal according to a reference signal, a first voltage level and a second voltage level. The control unit electrically connects to the comparison unit for receiving the comparing signal. Then, the control unit generates a control signal based on the comparing signal. The switch unit electrically connects to the control unit, and is on/off based on the control signal, so as to connect/disconnect the first power rail and the second power rail.

Abstract: A method for countervailing clock skew between a first clock signal and a second clock signal in a core logic circuit. The second clock signal is sampled based on the first clock signal in a sampling cycle to obtain a sampling result. When the sampling result indicates a non-compliant pattern, the phase of at least one of the first clock signal and the second clock signal is adjusted. Desirably, the core logic circuit keeps on working with the current first and second clock signals while continuing the sampling procedure of the second clock signal based on the first clock signal when the sampling result indicates a compliant pattern.

Abstract: A power control device includes a comparison unit, a control unit and a switch unit. The comparison unit electrically connects to a first power rail and a second power rail, respectively, and generates a comparing signal according to a reference signal, a first voltage level and a second voltage level. The control unit electrically connects to the comparison unit for receiving the comparing signal. Then, the control unit generates a control signal based on the comparing signal. The switch unit electrically connects to the control unit, and is on/off based on the control signal, so as to connect/disconnect the first power rail and the second power rail.