Patents by Inventor Paul Sung

Paul Sung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10974265
    Abstract: A spray device for delivering a mixture of fluids is disclosed comprising a removable fluid concentrate reservoir configured to hold a fluid concentrate, a single pump in fluid communication with the removable fluid concentrate reservoir and a fluid dilute reservoir and a top section comprising a manifold configured to mix a portion of the contents of the removable fluid concentrate reservoir with a portion of the fluid dilute reservoir. In some embodiments, the removable fluid concentrate reservoir is a removable concentrate cartridge and the fluid dilute reservoir is a removable dilute cartridge. In some embodiments, the fluid concentrate comprises a perfume. In some embodiments, the fluid concentrate comprises an essential oil.
    Type: Grant
    Filed: July 22, 2019
    Date of Patent: April 13, 2021
    Assignee: Paul Sung Ventresca LLC
    Inventor: Paul Sung Ventresca
  • Publication number: 20200259720
    Abstract: A system for enhancing efficiency of an enterprise network via electronic currency communication within the enterprise network. The system can include a first client computer configured to create a first electronic message, and a transaction database configured to store electronic currency. The system can include a server to receive the first electronic message from the first client computer, wherein the server includes an assessment module and an embedding module. The system can include a second client computer to receive the first electronic message containing the metadata from the server, parse the first electronic message containing the metadata to obtain an offer associated with the executable task, and determine whether to accept the offer. The server can include a reallocation module to reallocate network resources based on first client computer behavior data, second client computer behavior data, timestamp data, network topology data, network transactions data, network traffic data.
    Type: Application
    Filed: February 13, 2019
    Publication date: August 13, 2020
    Applicant: BOOZ ALLEN HAMILTON INC.
    Inventors: Mark Becker, Paul-Sung Hong, Matthew E. Lee
  • Patent number: 8998009
    Abstract: Provided is a wall assembly for goods display constituted by horizontal tracks fixed to a wall body and disposed in a lateral direction at equal intervals, vertical posts disposed on the horizontal tracks and disposed in a vertical direction at equal intervals, an interval adjustment unit configured to couple the vertical post with respect to the horizontal track to adjust an interval, an insert member inserted into the vertical post in the vertical direction, and an outer panel coupled to the vertical post. Accordingly, even when flatness of the wall body is bad, the wall assembly can be instructed and the flatness of the panel after construction can be appropriately maintained so that an appearance of a wall surface can be excellently finished. In addition, since removal and exchange of only a damaged panel are easy when the outer panel is damaged, construction and exchange can be easily performed.
    Type: Grant
    Filed: November 5, 2013
    Date of Patent: April 7, 2015
    Inventors: Paul Sung Kim, Kwang Suk Ko
  • Publication number: 20140183150
    Abstract: Provided is a wall assembly for goods display constituted by horizontal tracks fixed to a wall body and disposed in a lateral direction at equal intervals, vertical posts disposed on the horizontal tracks and disposed in a vertical direction at equal intervals, an interval adjustment unit configured to couple the vertical post with respect to the horizontal track to adjust an interval, an insert member inserted into the vertical post in the vertical direction, and an outer panel coupled to the vertical post. Accordingly, even when flatness of the wall body is bad, the wall assembly can be instructed and the flatness of the panel after construction can be appropriately maintained so that an appearance of a wall surface can be excellently finished. In addition, since removal and exchange of only a damaged panel are easy when the outer panel is damaged, construction and exchange can be easily performed.
    Type: Application
    Filed: November 5, 2013
    Publication date: July 3, 2014
    Inventors: Paul Sung KIM, Kwang Suk KO
  • Patent number: 7533004
    Abstract: A distributed computing environment for calibrating multiple components and reliably generating calibration data about each of the components. The calibration data from a plurality of calibration devices is stored in a database in a manner that avoids the problem of data collisions. The calibration devices include specific components or modules that allow each calibration device to independently generate calibration data, buffer calibration data, archive calibration data, transmit and receive data signals from a database, and receive data signals from a global network and display them for an operator. A method is disclosed which generated calibration data and subsequently detects and corrects calibration errors within a distributed network in a time frame that avoids the unnecessary disposal of improperly calibrated devices.
    Type: Grant
    Filed: October 20, 2003
    Date of Patent: May 12, 2009
    Assignee: Finisar Corporation
    Inventor: Paul Sung
  • Patent number: 7082556
    Abstract: The present invention relates generally to an improvement in the ability of test systems to test bit processing capacities of electronic devices, and in particular an improvement in their ability to test the operation of an electronic device's transmitter and receiver circuitry. Data generated by a BERT is transmitted in an electrical form to a DUT and a master device. The DUT transmits data received in an electrical form to the master device in an optical form and the master device transmits data received in an electrical form to the DUT in an optical form. The master device and the DUT then transmit data received in an optical form back to the BERT in an electrical form. The data received from the DUT and the master device, respectively, is separately tested for bit errors. Do so enables to calculation of bit error rates for two distinguishable data paths through the DUT.
    Type: Grant
    Filed: October 31, 2002
    Date of Patent: July 25, 2006
    Assignee: Finisar Corporation
    Inventors: Alex Fishman, Konstantinos G. Haritos, Paul Sung, Dmitri Bannikov, Serguei Dorofeev
  • Patent number: 6937949
    Abstract: Systems and methods for testing bit processing capacities of electronic devices and for reducing or eliminating jitter that compromises the ability of electronic devices to perform this task. Embodiments include circuitry and a methodology for locating and employing a data signal delay—in conjunction with a latch—to reduce or eliminate jitter from serial encoded data generated by a serializer/deserializer. The data signal delay ensures that the latch latches a state of the serial encoded data at a position within a data signal cycle of minimum jitter.
    Type: Grant
    Filed: October 31, 2002
    Date of Patent: August 30, 2005
    Assignee: Finisar Corporation
    Inventors: Alex Fishman, Konstantinos G. Haritos, Paul Sung, Dmitri Bannikov, Serguei Dorofeev
  • Publication number: 20040162686
    Abstract: A distributed computing environment for calibrating multiple components and reliably generating calibration data about each of the components. The calibration data from a plurality of calibration devices is stored in a database in a manner that avoids the problem of data collisions. The calibration devices include specific components or modules that allow each calibration device to independently generate calibration data, buffer calibration data, archive calibration data, transmit and receive data signals from a database, and receive data signals from a global network and display them for an operator. A method is disclosed which generated calibration data and subsequently detects and corrects calibration errors within a distributed network in a time frame that avoids the unnecessary disposal of improperly calibrated devices.
    Type: Application
    Filed: October 20, 2003
    Publication date: August 19, 2004
    Inventor: Paul Sung
  • Publication number: 20040153913
    Abstract: The present invention relates generally to an improvement in the ability of test systems to test bit processing capacities of electronic devices, and in particular an improvement in their ability to test the operation of an electronic device's transmitter and receiver circuitry. Data generated by a BERT is transmitted in an electrical form to a DUT and a master device. The DUT transmits data received in an electrical form to the master device in an optical form and the master device transmits data received in an electrical form to the DUT in an optical form. The master device and the DUT then transmit data received in an optical form back to the BERT in an electrical form. The data received from the DUT and the master device, respectively, is separately tested for bit errors. Do so enables to calculation of bit error rates for two distinguishable data paths through the DUT.
    Type: Application
    Filed: October 31, 2002
    Publication date: August 5, 2004
    Inventors: Alex Fishman, Konstantinos G. Haritos, Paul Sung, Dmitri Bannikov, Serguei Dorofeev
  • Patent number: D932901
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: October 12, 2021
    Assignee: Paul Sung Ventresca LLC
    Inventor: Paul Sung Ventresca