Patents by Inventor Paul Suppiah

Paul Suppiah has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7609102
    Abstract: A phase detector apparatus and method used for clock recovery from a data signal is provided. The phase detector provides phase correction signals to a clock signal generator, where the phase correction signals are only generated if a predetermined data sample pattern is observed. In particular, the predetermined data sample pattern is preferably a transition from one to zero. Thus, transitions from zero to one will not provide a valid phase update output signal, even though a transition has occurred. In other embodiments the predetermined data sample pattern is preferably a one to zero transition preceded by an additional logic one sample.
    Type: Grant
    Filed: May 24, 2006
    Date of Patent: October 27, 2009
    Assignee: Finisar Corporation
    Inventors: Naresh Shanbhag, Hyeon Min Bae, Jinki Park, Paul Suppiah
  • Publication number: 20090237138
    Abstract: A phase detector apparatus and method used for clock recovery from a data signal is provided. The phase detector provides phase correction signals to a clock signal generator, where the phase correction signals are only generated if a predetermined data sample pattern is observed. In particular, the predetermined data sample pattern is preferably a transition from one to zero. Thus, transitions from zero to one will not provide a valid phase update output signal, even though a transition has occurred. In other embodiments the predetermined data sample pattern is preferably a one to zero transition preceded by an additional logic one sample.
    Type: Application
    Filed: May 24, 2006
    Publication date: September 24, 2009
    Applicant: INTERSYMBOL COMMUNICATIONS, INC.
    Inventors: Naresh Shanbhag, Hyeon Min Bae, Jinki Park, Paul Suppiah
  • Patent number: 7298226
    Abstract: A noise tolerant voltage controlled oscillator is described. The voltage controlled oscillator include a varactor element as part of an LC tank circuit. The varactor element is biased by a bias signal and a bias-dependent control signal. The bias-dependent control signal tunes the LC tank circuit. Because the control signal is bias-dependent, noise and other deleterious influences do not cause the varactor element to deviate in capacitance. Instead, the bias-dependent control signal is a tuning signal that is centered around the bias signal, which allows the varactor element to provide a constant capacitance in the event of a varying bias signal.
    Type: Grant
    Filed: May 24, 2006
    Date of Patent: November 20, 2007
    Assignee: Finisar Corporation
    Inventors: Naresh Shanbhag, Hyeon Min Bae, Jinki Park, Paul Suppiah
  • Publication number: 20070018742
    Abstract: A noise tolerant voltage controlled oscillator is described. The voltage controlled oscillator include a varactor element as part of an LC tank circuit. The varactor element is biased by a bias signal and a bias-dependent control signal. The bias-dependent control signal tunes the LC tank circuit. Because the control signal is bias-dependent, noise and other deleterious influences do not cause the varactor element to deviate in capacitance. Instead, the bias-dependent control signal is a tuning signal that is centered around the bias signal, which allows the varactor element to provide a constant capacitance in the event of a varying bias signal.
    Type: Application
    Filed: May 24, 2006
    Publication date: January 25, 2007
    Applicant: INTERSYMBOL COMMUNICATIONS, INC.
    Inventors: Naresh Shanbhag, Hyeon Bae, Jinki Park, Paul Suppiah