Patents by Inventor Paul T. Phillips

Paul T. Phillips has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6782611
    Abstract: A method of assembling a multi-chip device may include coupling solder balls only to selected ones of the conductive pads on an interposer with cache memory devices. The cache memory devices are then tested, and the interposer is coupled to a substrate with the solder balls for further assembly only if the test is passed.
    Type: Grant
    Filed: September 17, 1999
    Date of Patent: August 31, 2004
    Assignee: Intel Corporation
    Inventors: William A. Samaras, Paul T. Phillips, Michael P. Brownell
  • Publication number: 20010047882
    Abstract: A land grid array (LGA) carrier includes an interposer having a first surface and a second surface opposite the first surface, with a plurality of locations on the first surface adapted to receive a plurality of semiconductor dice and passive components. The second surface has a plurality of conductive pads coupled thereto.
    Type: Application
    Filed: September 17, 1999
    Publication date: December 6, 2001
    Inventors: WILLIAM A. SAMARAS, PAUL T. PHILLIPS, MICHAEL P. BROWNELL
  • Patent number: 6097611
    Abstract: A land grid array (LGA) carrier includes an interposer having a first surface and a second surface opposite the first surface, with a plurality of locations on the first surface adapted to receive a plurality of semiconductor dice and passive components. The second surface has a plurality of conductive pads coupled thereto.
    Type: Grant
    Filed: September 17, 1999
    Date of Patent: August 1, 2000
    Assignee: Intel Corporation
    Inventors: William A. Samaras, Paul T. Phillips, Michael P. Brownell
  • Patent number: 5991161
    Abstract: A land grid array (LGA) carrier includes an interposer having a first surface and a second surface opposite the first surface, with a plurality of locations on the first surface adapted to receive a plurality of semiconductor dice and passive components. The second surface has a plurality of conductive pads coupled thereto.
    Type: Grant
    Filed: December 19, 1997
    Date of Patent: November 23, 1999
    Assignee: Intel Corporation
    Inventors: William A. Samaras, Paul T. Phillips, Michael P. Brownell