Abstract: The data cache of a processor is segregated by execution mode, eliminating the danger of certain malware by no longer sharing the resource. Kernel-mode software can adjust the relative size of the two portions of the data cache, to dynamically accommodate the data-cache needs of varying workloads.

Abstract: The data cache of a processor is segregated by execution mode, eliminating the danger of certain malware by no longer sharing the resource. Kernel-mode software can adjust the relative size of the two portions of the data cache, to dynamically accommodate the data-cache needs of varying workloads.

Abstract: The data cache of a processor is segregated by execution mode, eliminating the danger of certain malware by no longer sharing the resource. Kernel-mode software can adjust the relative size of the two portions of the data cache, to dynamically accommodate the data-cache needs of varying workloads.

Abstract: The data cache of a processor is segregated by execution mode, eliminating the danger of certain malware by no longer sharing the resource. Kernel-mode software can adjust the relative size of the two portions of the data cache, to dynamically accommodate the data-cache needs of varying workloads.

Abstract: In a system for implementing virtual machines a Virtual Machine Monitor (VMM) is assigned an address space separate and distinct from the address space assigned to the virtual machines (VMs). A VM-bit is used to determine whether the processor is executing a process in the VM or the VMM. Through the use of the separate address spaces and the VM-bit a system is disclosed wherein the VMM can take full advantage of all the protection rings offered by the system on which it runs and the VMs are also allowed to operate in an environment that essentially offers the same number of real protection rings as are available on the underlying computer system.

Abstract: A digital computer system includes at least one process, an input/output subsystem, and an input/output interface. The process which input/output requests and receives input/output responses. The input/output system perform input/output operations and generates completion notifications in response thereto. The input/output interface generates input/output responses for the process in the order in which the process issued the input/output requests, to reduce the possibility of the process obtaining information from the order in which the input/output system processed input/output requests.

Abstract: A central processing unit (CPU) executing a virtual memory management system employs a translation buffer for caching recently used page table entries. When more than one process is executing on the CPU, the translation buffer is usually flushed when a context switch is made, even though some of the entries would still be valid for commonly-referenced memory areas. An address space number feature is employed to allow entries to remain in the translation buffer for processes not currently executing, and the separate processes or the operating system can reuse entries in the translation buffer for such pages of memory that are commonly referenced. To allow this, an "address space match" entry in the page table entry signals that the translation buffer content can be used when the address tag matches, even though the address space numbers do not necessarily match.

Abstract: A digital computer system for processing at least one process, said process generating operational requests for enabling selected operations. The computer system comprises a timer portion for generating two series of unpredictable timing indications. An operational processor portion is responsive to the timing indications from said timer and the operational requests for initiating operations enabled by the operational requests in response to one of the series of timing indications. The operational processor communicates with the processes regarding operations enabled with respective operational requests in response to the second series of timing indications.