Abstract: A scanning focal plane sensor and method are described for image capturing of object space (or scenes). In one example, a focal plane sensor for a scanning imaging system is provided. The focal plane sensor for a scanning imaging system includes M×N Time Delay Integration (TDI) imaging Charge Coupled Device (CCD), where M is a number of TDI columns and N is a number of TDI stages per each column. A detector is connected to each TDI stage. The focal plane sensor includes an imaging controller configured to mechanize sampling the brightness value of each sensor pixel's initial footprint in object space and select a number of charge integrating TDI stages for substantially equalizing the inter sensor pixels' signal to noise ratios.

Abstract: A charge coupled device imager, which can operate in time delay and integration mode, can be adapted to include variable columns having one or more blocking gates or other barriers that can be independently controlled and used to divide a used portion from an unused portion. The blocking gates may require less power to electrically insulate used from the unused sections. In this regard, an imager's charge handling capacity and dynamic range can be improved, while lowering CCD operating power requirements. Blooming drains can also be included to enhance the functionality of the imager and enable bidirectional imaging capability.

Abstract: An Indium Tin Oxide (ITO) gate charge coupled device (CCD) is provided. The CCD device comprises a CCD structure having a substrate layer, an oxide layer over the substrate layer, a nitride layer over the oxide layer and a plurality of parallel ITO gates extending over the nitride layer. The CCD device further comprises a plurality of substantially similarly sized channel stop regions in the substrate layer that extend transversely relative to the ITO gates, such that a given pair of channel stop regions defining a pixel column of the CCD structure. The CCD device also comprises a plurality of vent openings that extend through the nitride layer along the plurality of substantially similarly sized channel stop regions to allow for penetration of hydrogen to at least one of the oxide layer and the substrate layer.

Abstract: An Indium Tin Oxide (ITO) gate charge coupled device (CCD) is provided. The CCD device comprises a CCD structure having a substrate layer, an oxide layer over the substrate layer, a nitride layer over the oxide layer and a plurality of parallel ITO gates extending over the nitride layer. The CCD device further comprises a plurality of substantially similarly sized channel stop regions in the substrate layer that extend transversely relative to the ITO gates, such that a given pair of channel stop regions defining a pixel column of the CCD structure. The CCD device also comprises a plurality of vent openings that extend through the nitride layer along the plurality of substantially similarly sized channel stop regions to allow for penetration of hydrogen to at least one of the oxide layer and the substrate layer.

Abstract: A charge coupled device imager, which can operate in time delay and integration mode, can be adapted to include variable columns having one or more blocking gates or other barriers that can be independently controlled and used to divide a used portion from an unused portion. The blocking gates may require less power to electrically insulate used from the unused sections. In this regard, an imager's charge handling capacity and dynamic range can be improved, while lowering CCD operating power requirements. Blooming drains can also be included to enhance the functionality of the imager and enable bidirectional imaging capability.

Abstract: A multi-layer semiconductor device utilizes the good thermal and electrical properties of a polycrystalline substrate with the electrical properties of single crystal film transferred via wafer bonding. The device structure includes a polycrystalline, e.g., silicon carbide substrate, which was polished. A planarization layer of silicon is formed on the surface, followed by chemical mechanical polishing. The substrate is then bonded to either a bulk silicon wafer or a silicon-on-insulator (SOI) wafer. The silicon (SOI) wafer is thinned to the desired thickness.

Abstract: The operating characteristics of a dynamic comparator is used to automatically change the resolution of a sloped or ramped analog-to-digital converter (ADC) by switching the comparator on and off between first (slow) and second (fast) clock frequencies and comparing the amplitude of a sampled input signal against a ramp input signal. The slow clock frequency is first used to determine the area of interest, while the fast clock frequency is then used to zoom into a high resolution area of interest.

Abstract: The operating characteristics of a dynamic comparator is used to automatically change the resolution of a sloped or ramped analog-to-digital converter (ADC) by switching the comparator on and off between first (slow) and second (fast) clock frequencies and comparing the amplitude of a sampled input signal against a ramp input signal. The slow clock frequency is first used to determine the area of interest, while the fast clock frequency is then used to zoom into a high resolution area of interest.