Abstract: Satellite positioning system (SATPS) receiver that has a plurality of modes and channels, where a timeline module configures the channels based on the mode of operation of the SATPS receiver and reconfigures the channels if the mode of operation of the SATPS changes.

Abstract: Systems and methods are disclosed herein to use sieving to reduce the number of hypotheses and the length of time for acquisition of GPS satellite signals. In sieving, hypothesis testing is performed after a short non-coherent integration duration on a first set of hypotheses. At the end of the non-coherent integration time, multiple candidate hypotheses having high likelihood of signal detection are identified. Further non-coherent integration of each candidate hypothesis is performed by using a tracking loop to remove Doppler frequency and code phase variations on the signal. In parallel, additional hypotheses testing is performed on a second set of hypotheses. At the end of the next non-coherent integration time, the best candidate hypotheses among the candidate hypotheses sieved from the first set of hypotheses running in the tracking loops and the candidate hypotheses from the second set of hypotheses are identified.

Abstract: Satellite positioning system (SATPS) receiver that has a plurality of modes and channels, where a timeline module configures the channels based on the mode of operation of the SATPS receiver and reconfigures the channels if the mode of operation of the SATPS changes.

Abstract: Satellite positioning system (SATPS) receiver that has a plurality of modes and channels, where a timeline module configures the channels based on the mode of operation of the SATPS receiver and reconfigures the channels if the mode of operation of the SATPS changes.

Abstract: Systems and methods are disclosed herein to use sieving to reduce the number of hypotheses and the length of time for acquisition of GPS satellite signals. In sieving, hypothesis testing is performed after a short non-coherent integration duration on a first set of hypotheses. At the end of the non-coherent integration time, multiple candidate hypotheses having high likelihood of signal detection are identified. Further non-coherent integration of each candidate hypothesis is performed by using a tracking loop to remove Doppler frequency and code phase variations on the signal. In parallel, additional hypotheses testing is performed on a second set of hypotheses. At the end of the next non-coherent integration time, the best candidate hypotheses among the candidate hypotheses sieved from the first set of hypotheses running in the tracking loops and the candidate hypotheses from the second set of hypotheses are identified.

Abstract: A receiver capable of receiving a spread spectrum signal and having a crosscorrelator that enables a carrier wave (CW) jamming to be identified, tracked, replicated and removed from the received spread spectrum signal after demodulation of a weak signal has occurred.

Abstract: An Edge-Aligned Ratio Counter (EARC) that includes at least one processor coupled to at least one counter circuit is provided for determining a ratio between two clock signals by receiving a first and a second value in response to a first clock signal and generating a control signal under control of the loaded value by counting the pulses of the first clock signal and a second clock signal and captures the count of each clock signal in response to the control signal and determining a ratio between a frequency of the first clock signal and a frequency of the second clock signal using the differences of the captured counts taken at two different occurrences of the control signal.

Abstract: Satellite positioning system (SATPS) receiver that has a plurality of modes and channels, where a timeline module configures the channels based on the mode of operation of the SATPS receiver and reconfigures the channels if the mode of operation of the SATPS changes.

Abstract: A low frequency timing circuit is used to reestablish a timing signal in a high-frequency timing circuit after the high frequency timing circuit has lost and regained power. The timing of the low frequency circuit is measured against the timing of the high frequency circuit before the high frequency circuit has lost power. The low frequency circuit then is used to measure time after the high frequency circuit has lost power. Once the high frequency circuit has regained power, its timing signal is reestablished at an appropriate time based on a time measurement obtained from the low frequency circuit.

Abstract: An Edge-Aligned Ratio Counter (EARC) that includes at least one processor coupled to at least one counter circuit is provided for determining a ratio between two clock signals by receiving a first and a second value in response to a first clock signal and generating a control signal under control of the loaded value by counting the pulses of the first clock signal and a second clock signal and captures the count of each clock signal in response to the control signal and determining a ratio between a frequency of the first clock signal and a frequency of the second clock signal using the differences of the captured counts taken at two different occurrences of the control signal.

Abstract: A data detection circuit within a global positioning system (GPS) satellite receiver operates to detect and decode data sent in a spread spectrum signal. The data detection circuit receives input from a radio receiver, the information containing data from a plurality of satellites. The data is supplied to a circular memory device, which determines which data corresponds to which satellite. The memory device sends the received signal to a matched filter, which decodes the signal received from each satellite. This signal is analyzed to determine whether a phase inversion due to data modulation on the received signal is present. The phase inversion can occur at boundaries, known as data epochs, in the received signal, and corresponds to data in the received signal. This data contains information relating to the position of each satellite and is collected by the data detection circuit for use by the GPS receiver.

Abstract: A cell phone is provided that may be used with multiple radio formats, such as GSM and CDMA. The cell phone includes a receiver that receives radio signals and converts them into electrical signals. An analog to digital converter is connected to the receiver and converts an analog input to a digital output having an adjustable number of bits at an adjustable sampling frequency. A cell phone application specific integrated circuit is connected to the analog to digital converter, which is used to process the digital output to extract encoded telecommunications data in one of the supported radio formats.

Abstract: A signal processing system control method and apparatus are described. Various embodiments include a signal processing system with multiple subsystems. A method for controlling the signal processing system includes storing channel records in a designated area of shared memory. A channel records include channel data which includes one of multiple discrete signals to be processed by multiple subsystems in a time-multiplexed manner. The channel record includes information used by the multiple subsystems to process a channel, including information used to configure the multiple subsystems, information used to allocate the shared memory, and information used to communicate between multiple subsystems.

Abstract: A receiver capable of receiving a spread spectrum signal and having a crosscorrelator that enables a carrier wave (CW) jamming to be identified, tracked, replicated and removed from the received spread spectrum signal after demodulation of a weak signal has occurred.

Abstract: A method and system for dynamic memory allocation and sharing in electronic systems. Embodiments include multi-channel signal processing, including continuously receiving multiple channels, wherein each channel comprises a discrete signal, and processing the multiple channels in a signal processing component on a time-multiplexed basis. Processing the multiple channels includes configuring the signal processing component for one of a plurality of operational modes, including allocating a memory into areas for storage of types of data, wherein certain areas are accessed by certain signal processing subsystems in certain manners. Configuring includes configuring the signal processing component to operate in different modes concurrently for different channels.

Abstract: A cancellation system may utilize a system architecture that delays the received signals and cancels less than all the received signals from the delayed version of the received signals. An implementation of this system architecture may include a delay circuit, a demodulation and despreader unit, a re-modulator and re-spreader unit and a combiner. The delay circuit produces a delayed version of the received signals and the demodulator and de-spreader unit produces a demodulated and de-spread signal corresponding to one of the received signals. The respreader and remodulator unit produces a remodulated and respread signal from the demodulated and despread signal and the combiner produces a combined signal from the delayed version of the received signals and the remodulated and respread signal. The cancellation system may also utilize a system architecture that stores the received signals and cancels less than all the received signals from the stored version of the received signals.

Abstract: Implementation of an improved matched filter system for despreading a PN code from a spread spectrum signal utilizes a matched filter system that may be broadly conceptualized as a system that optimizes the number of multipliers and adders utilized by the system in despreading a PN code from a spread spectrum signal. This lowers the power consumption of the improved matched filter system and increases the speed at which the system despreads the PN code from the spread spectrum signal.

Abstract: Implementation of an improved matched filter system for despreading a PN code from a spread spectrum signal utilizes a matched filter system that may be broadly conceptualized as a system that optimizes the number of multipliers and adders utilized by the system in despreading a PN code from a spread spectrum signal. This lowers the power consumption of the improved matched filter system and increases the speed at which the system despreads the PN code from the spread spectrum signal.