Abstract: An analog signal-to-pulse width modulation (PWM) converter includes a ramp generator generating a ramp signal and a comparator circuit comparing the ramp signal to a first voltage, a second voltage, and to an analog input signal. A duty cycle calculation circuit generates a first control signal to the ramp generator to generate the ramp signal. Based on signals from the comparator circuit, the duty cycle calculation circuit calculates the ratio of the time it takes for the ramp signal to exceed the analog input signal from when the ramp signal exceeds the first voltage to the time it takes for the ramp signal to exceed the second voltage from when the ramp signal exceeds the first voltage. A PWM signal generator generates a PWM output signal based on the ratio calculated by the duty cycle calculation circuit.

Abstract: An analog signal-to-pulse width modulation (PWM) converter includes a ramp generator generating a ramp signal and a comparator circuit comparing the ramp signal to a first voltage, a second voltage, and to an analog input signal. A duty cycle calculation circuit generates a first control signal to the ramp generator to generate the ramp signal. Based on signals from the comparator circuit, the duty cycle calculation circuit calculates the ratio of the time it takes for the ramp signal to exceed the analog input signal from when the ramp signal exceeds the first voltage to the time it takes for the ramp signal to exceed the second voltage from when the ramp signal exceeds the first voltage. A PWM signal generator generates a PWM output signal based on the ratio calculated by the duty cycle calculation circuit.

Abstract: An analog signal-to-pulse width modulation (PWM) converter includes a ramp generator generating a ramp signal and a comparator circuit comparing the ramp signal to a first voltage, a second voltage, and an analog input signal. A duty cycle calculation circuit generates a first control signal to the ramp generator to generate the ramp signal. Based on signals from the comparator circuit, the duty cycle calculation circuit calculates the ratio of the time it takes for the ramp signal to exceed the analog input signal from when the ramp signal exceeds the first voltage to the time it takes for the ramp signal to exceed the second voltage from when the ramp signal exceeds the first voltage. A PWM signal generator generates a PWM output signal based on the ratio calculated by the duty cycle calculation circuit.

Abstract: An analog signal-to-pulse width modulation (PWM) converter includes a ramp generator generating a ramp signal and a comparator circuit comparing the ramp signal to a first voltage, a second voltage, and an analog input signal. A duty cycle calculation circuit generates a first control signal to the ramp generator to generate the ramp signal. Based on signals from the comparator circuit, the duty cycle calculation circuit calculates the ratio of the time it takes for the ramp signal to exceed the analog input signal from when the ramp signal exceeds the first voltage to the time it takes for the ramp signal to exceed the second voltage from when the ramp signal exceeds the first voltage. A PWM signal generator generates a PWM output signal based on the ratio calculated by the duty cycle calculation circuit.

Abstract: A multi-rail power-supply system provides power to circuitry requiring at least one additional rail between a high and a low-voltage rail. The system comprises a first power regulator that interconnects the high-voltage rail and an intermediate node and sets a first voltage rail that has a magnitude that is less than the high-voltage rail, wherein current that flows from the high-voltage rail is employed by a first set of peripheral circuitry prior to sinking through the first power regulator to the intermediate node. The system further comprises a second power regulator that interconnects the intermediate node and the low-voltage rail and sets a second voltage rail that has a magnitude that is greater than the low-voltage rail, wherein current that flows from the intermediate node is sourced by the second regulator and is employed by a second set of peripheral circuitry prior to flowing to the low-voltage rail.

Abstract: A multi-rail power-supply system provides power to circuitry requiring at least one additional rail between a high and a low-voltage rail. The system comprises a first power regulator that interconnects the high-voltage rail and an intermediate node and sets a first voltage rail that has a magnitude that is less than the high-voltage rail, wherein current that flows from the high-voltage rail is employed by a first set of peripheral circuitry prior to sinking through the first power regulator to the intermediate node. The system further comprises a second power regulator that interconnects the intermediate node and the low-voltage rail and sets a second voltage rail that has a magnitude that is greater than the low-voltage rail, wherein current that flows from the intermediate node is sourced by the second regulator and is employed by a second set of peripheral circuitry prior to flowing to the low-voltage rail.

Abstract: This invention is directed to a method and apparatus for determining the level of ambient light impinging on a selected number of pixels in an imaging array where each pixel includes a photodiode. The ambient light may be determined by resetting the pixels in the array and by detecting current flow through the photodiodes in a selected number of the pixels as they are being reset. Alternately, the ambient light may be determined by resetting a selected number of the pixels in the array and by detecting current flow through the photodiodes in the selected number of the pixels as they are being reset. The photodiodes are reset by applying a reverse bias voltage across them and the current flow is detected by measuring the current flow through a resistance in parallel to the selected photodiodes. The selected number of pixels may be divided into one or more groups each having at least one pixel, and the pixels in each group may be arranged in specific patterns within the array.