Abstract: A reticle inspection system and related method are disclosed. The system includes a concave spherical mirror positioned adjacent a side of the reticle that is configured to reflect inspection light transmitted through the reticle back towards and through the reticle. A sensor is configured to create at least one of: a first inspection image representative of a circuit pattern of the reticle based on transmission of the inspection light through the first side of the reticle and a reflection thereof by the concave spherical mirror through the second side of the reticle, and a second inspection image representative of the circuit pattern of the reticle based on the reflection of the inspection light from the first side of the reticle. A controller is configured to identify a defect in the reticle based on at least one of the first inspection image and the second inspection image.

Abstract: A reticle inspection system and related method are disclosed. The system includes a concave spherical mirror positioned adjacent a side of the reticle that is configured to reflect inspection light transmitted through the reticle back towards and through the reticle. A sensor is configured to create at least one of: a first inspection image representative of a circuit pattern of the reticle based on transmission of the inspection light through the first side of the reticle and a reflection thereof by the concave spherical mirror through the second side of the reticle, and a second inspection image representative of the circuit pattern of the reticle based on the reflection of the inspection light from the first side of the reticle. A controller is configured to identify a defect in the reticle based on at least one of the first inspection image and the second inspection image.

Abstract: An optical mask has a first pellicle attached. The optical mask is inspected with the first pellicle in place using first wavelengths of electromagnetic radiation. The first pellicle is replaced with a second pellicle. The first pellicle only allows the first wavelengths of electromagnetic radiation to pass, and the second pellicle allows second wavelengths that are shorter than the first wavelengths to pass. A photoresist is exposed using the optical mask with the second pellicle in place. The second pellicle is replaced with the first pellicle. The optical mask is again inspected with the first pellicle in place using the first wavelengths of electromagnetic radiation.

Abstract: An optical mask has a first pellicle attached. The optical mask is inspected with the first pellicle in place using first wavelengths of electromagnetic radiation. The first pellicle is replaced with a second pellicle. The first pellicle only allows the first wavelengths of electromagnetic radiation to pass, and the second pellicle allows second wavelengths that are shorter than the first wavelengths to pass. A photoresist is exposed using the optical mask with the second pellicle in place. The second pellicle is replaced with the first pellicle. The optical mask is again inspected with the first pellicle in place using the first wavelengths of electromagnetic radiation.

Abstract: A method and apparatus for generating a final dielectric etch compensation table and a final hard mask etch compensation table for either OPC or MPC process flows are provided. Embodiments include performing an overlap pattern classification on a wafer; calibrating a dielectric etch bias or a hard mask etch bias based on the pattern classification; comparing either a CD overlap of a via layer with a metal layer and a CD overlap of the via layer with a lower connecting metal layer or a CD overlap of the metal layer with an upper connecting via layer and a CD overlap of the metal layer with the via layer against a criteria; outputting final dielectric etch compensation and hard mask etch compensation tables to either OPC or MPC process flows; and repeating the steps of calibrating, comparing, and outputting for either the via layer or metal layer remaining.

Abstract: A method and apparatus for generating a final dielectric etch compensation table and a final hard mask etch compensation table for either OPC or MPC process flows are provided. Embodiments include performing an overlap pattern classification on a wafer; calibrating a dielectric etch bias or a hard mask etch bias based on the pattern classification; comparing either a CD overlap of a via layer with a metal layer and a CD overlap of the via layer with a lower connecting metal layer or a CD overlap of the metal layer with an upper connecting via layer and a CD overlap of the metal layer with the via layer against a criteria; outputting final dielectric etch compensation and hard mask etch compensation tables to either OPC or MPC process flows; and repeating the steps of calibrating, comparing, and outputting for either the via layer or metal layer remaining.

Abstract: A method for processing a semiconductor substrate is presented wherein an alignment mark is formed in an alignment mark area of the semiconductor substrate. The alignment mark area is contained within a window area of the semiconductor substrate. The upper surface of the semiconductor substrate within the window area is recessed below the upper surface of the semiconductor substrate outside of the window area, preferably by exposing the upper surface of the semiconductor substrate within the window area to an etchant. Such recession forms an alignment mark trench within the window area. Being substantially recessed below the original surface of the semiconductor substrate, an alignment mark formed in such a manner may be substantially protected from chemical-mechanical polishing damage during subsequent processing steps.

Abstract: An alignment mark protection structure (95) is disclosed which is used to ensure an integrity of an alignment scheme for a substrate (50) which is to be subjected to lithographic processing. The alignment mark protection structure (95) comprises the substrate (50) and an alignment mark (52) associated with the substrate (50). The alignment mark (52) reflects an alignment light (208) which is then used to determine an optimum alignment between the substrate (50) and a lithographic mask (214). A cap (100) overlies the alignment mark (52) and is substantially transparent with respect to the alignment light (208). The cap (100) protects the underlying alignment mark (52) from lithographic process-induced damage during processing and thus reduces alignment light noise, thereby improving the alignment between a mask (214) and the substrate (50) and minimizing the registration error associated with overlying layers formed on the substrate (50).

Abstract: A method (200) of characterizing a lithographic printer includes the steps of printing a first and second pattern (202, 228) on substrates (214) using a reticle (220) having a first and second orientation. The method (200) further includes measuring a critical dimension of the first and second pattens at two points (230, 234) and determining an imaging system component of the critical dimension of the patterns at the two points (236). The method (200) may be further expanded to encompass substantially all the points within the image field.

Abstract: An improved method of planarizing a level of metallization employs a trench in a smooth-surfaced dielectric and a sequence of etching steps to cut the trench locally down to the substrate, while forming the main metallization pattern at the same time.