Patents by Inventor Paul W. Brazis, Jr.
Paul W. Brazis, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9869719Abstract: A high speed controllable load uses a voltage waveform synthesizer and a driver circuit to dynamically control an electronically variable load to generate a current though an arc fault circuit interrupter (AFCI) device under test. Sensors may be used to monitor a source voltage and the output current to generate an arbitrary waveform have a range of voltage and current phase shifts. An optical isolation circuit allows separation of grounds between a control stage and the AFCI device under test.Type: GrantFiled: December 19, 2016Date of Patent: January 16, 2018Assignee: UL LLCInventor: Paul W. Brazis, Jr.
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Publication number: 20170097391Abstract: A high speed controllable load uses a voltage waveform synthesizer and a driver circuit to dynamically control an electronically variable load to generate a current though an arc fault circuit interrupter (AFCI) device under test. Sensors may be used to monitor a source voltage and the output current to generate an arbitrary waveform have a range of voltage and current phase shifts. An optical isolation circuit allows separation of grounds between a control stage and the AFCI device under test.Type: ApplicationFiled: December 19, 2016Publication date: April 6, 2017Inventor: Paul W. Brazis, JR.
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Patent number: 9551751Abstract: A high speed controllable load uses a voltage waveform synthesizer and a driver circuit to dynamically control an electronically variable load to generate a current though an arc fault circuit interrupter (AFCI) device under test. Sensors may be used to monitor a source voltage and the output current to generate an arbitrary waveform have a range of voltage and current phase shifts. An optical isolation circuit allows separation of grounds between a control stage and the AFCI device under test.Type: GrantFiled: June 15, 2011Date of Patent: January 24, 2017Assignee: UL LLCInventor: Paul W. Brazis, Jr.
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Patent number: 9451247Abstract: A camera testing apparatus includes a frame assembly, a control unit, and a plurality of first light sources and second light sources coupled to the frame assembly and in communication with the control unit. Each of the first and second light sources is in one of an illuminated first state or a non-illuminated second state, and each of the plurality of first and second light sources is adapted to be within a field of vision of a camera disposed remote from the first and second light sources. The control unit sends a first command to each of the first light sources to change a first operational parameter. The control unit sends a second command to a first one of the second light sources to illuminate at a first brightness and a third command to a second one of the second light sources to illuminate at a second brightness.Type: GrantFiled: November 21, 2014Date of Patent: September 20, 2016Assignee: UL LLCInventors: Fan He, Paul W. Brazis, Jr.
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Publication number: 20150146016Abstract: A camera testing apparatus includes a frame assembly, a control unit, and a plurality of first light sources and second light sources coupled to the frame assembly and in communication with the control unit. Each of the first and second light sources is in one of an illuminated first state or a non-illuminated second state, and each of the plurality of first and second light sources is adapted to be within a field of vision of a camera disposed remote from the first and second light sources. The control unit sends a first command to each of the first light sources to change a first operational parameter. The control unit sends a second command to a first one of the second light sources to illuminate at a first brightness and a third command to a second one of the second light sources to illuminate at a second brightness.Type: ApplicationFiled: November 21, 2014Publication date: May 28, 2015Inventors: Fan He, Paul W. Brazis, JR.
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Publication number: 20120319709Abstract: A high speed controllable load uses a voltage waveform synthesizer and a driver circuit to dynamically control an electronically variable load to generate a current though an arc fault circuit interrupter (AFCI) device under test. Sensors may be used to monitor a source voltage and the output current to generate an arbitrary waveform have a range of voltage and current phase shifts. An optical isolation circuit allows separation of grounds between a control stage and the AFCI device under test.Type: ApplicationFiled: June 15, 2011Publication date: December 20, 2012Applicant: UNDERWRITERS LABORATORIES INC.Inventor: Paul W. Brazis, JR.
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Publication number: 20100163861Abstract: A method and apparatus for an optically transparent field effect transistor on a substrate. The gate electrode, the dielectric, the semiconducting layer, the source electrode, and the drain electrode are optically transparent layers of nanoparticles that are formed using one or more graphic arts printing processes. The dielectric layer is in contact with the gate electrode, the semiconducting layer is in contact with the dielectric layer, and the source and drain electrodes are in contact with the semiconducting layer.Type: ApplicationFiled: December 29, 2008Publication date: July 1, 2010Applicant: Motorola, Inc.Inventor: Paul W. Brazis, JR.
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Patent number: 6677607Abstract: A semiconductor device having a flexible or rigid substrate (11) having a gate electrode (21), a source electrode (61 and 101), and a drain electrode (62 and 102) formed thereon and organic semiconductor material (51, 81, and 91) disposed at least partially thereover. The gate electrode (21) has a thin dielectric layer 41 formed thereabout through oxidation. In many of the embodiments, any of the above elements can be formed through contact or non-contact printing. Sizing of the resultant device can be readily scaled to suit various needs.Type: GrantFiled: January 25, 2002Date of Patent: January 13, 2004Assignee: Motorola, Inc.Inventors: Steven M. Scheifers, Daniel R. Gamota, Paul W. Brazis, Jr., Jie Zhang, Lawrence E. Lach
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Patent number: 6603141Abstract: A semiconductor device formed of a flexible or rigid substrate (10) having a gate electrode (11), a source electrode (12), and a drain electrode (13) formed thereon and organic semiconductor material (14) disposed at least partially thereover. With appropriate selection of material, the gate electrode (11) will form a Schottky junction and an ohmic contact will form between the organic semiconductor material (14) and each of the source electrode (12) and drain electrode (13). In many of the embodiments, any of the above elements can be formed through contact or non-contact printing. Sizing of the resultant device can be readily scaled to suit various needs.Type: GrantFiled: December 28, 2001Date of Patent: August 5, 2003Assignee: Motorola, Inc.Inventors: Lawrence E. Lach, Steven M. Scheifers, Jie Zhang, Daniel R. Gamota, Paul W. Brazis, Jr.