Patents by Inventor Paul W. Latham
Paul W. Latham has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 8866463Abstract: A switching power supply includes a circuit having at least two reactive components to provide an output voltage and capable of being switched from a first output state to a second output state. A switching component switches the circuit between at least two switching states including the first output state and the second output state. A pulse width modulator receives a duty cycle and drives the switching component to cause switching between two of the at least two switching states. A nonlinear controller component provides a duty cycle to the pulse width modulator. The duty cycle corresponds to at least one predetermined power supply state variable. The nonlinear controller component includes a processor to apply an optimization technique to minimize a predetermined function of the duty cycle and internal states of the power supply and to obtain a relationship between the duty cycle and at least one predetermined state variable.Type: GrantFiled: January 25, 2013Date of Patent: October 21, 2014Assignee: Maxim Integrated Products, Inc.Inventors: Paul W. Latham, II, John C. Canfield
-
Patent number: 8634008Abstract: Methods and apparatus are provided for performing multiple correlated double sampling (CDS) operations on an imaging pixel, and in some cases on an array of imaging pixels, during a single integration cycle of the pixel(s). The multiple CDS operations may produce multiple CDS values, which may be processed in combination to produce a resulting value substantially free of various types of noise. The CDS operations may be performed using a CDS circuit including a single-ended charge amplifier having an input capacitor. The charge amplifier may also include a variable capacitance providing a variable gain. The variable capacitance may be provided by a feedback capacitor.Type: GrantFiled: May 3, 2012Date of Patent: January 21, 2014Assignee: Infrared Newco, Inc.Inventors: Bryan D. Ackland, Paul W. Latham, II, Joshua C. Park
-
Patent number: 8629663Abstract: A first control system for a power supply includes a switch-mode DC-DC converter module and an FET gate drive module. The switch-mode DC-DC converter module receives an input voltage and generates first and second voltages, the first voltage powering a DC-DC control module. The FET gate drive module selectively drives a plurality of FETs of the power supply using the second voltage thereby generating a desired output voltage from the input voltage. A second control system is directed to driving the second voltage to a desired gate voltage, wherein the desire gate voltage is determined based on at least one of a plurality of operating parameters. A third control system includes controlling first and second voltages generated by a SIDO voltage converter based on the first and second voltages and a damping factor, and generating the damping factor based on current flowing through the inductor of the SIDO voltage converter.Type: GrantFiled: April 1, 2011Date of Patent: January 14, 2014Assignee: Maxim Integrated Products, Inc.Inventors: Paul W. Latham, II, Mansur B. Kiadeh, Sudha Durvasula
-
Patent number: 8508205Abstract: A method and apparatus for converting a DC voltage to a lower DC voltage, provides for conducting current from an input terminal, through an inductor to charge a capacitor connected to the inductor at an output terminal and to provide a varying range of load current from the output terminal, alternately switching the input terminal between a supply voltage and a ground potential to produce a desired voltage at the output terminal that is lower than the supply voltage, while providing the varying range of load current, and disconnecting the input terminal from both the supply voltage and the ground potential to reduce an increase in voltage at the output terminal caused by a substantial reduction in the load current, while current through the inductor adjusts in response to the reduced load current.Type: GrantFiled: March 22, 2010Date of Patent: August 13, 2013Assignee: L&L Engineering, LLCInventors: Paul W. Latham, II, Stewart Kenly
-
Patent number: 8395365Abstract: In one embodiment, the controller of these teachings includes a nonlinear controller component capable of providing an amplitude determining input signal to a control signal providing component, the control signal providing component providing output having a predetermined amplitude substantially over one time interval from a number of time intervals or output having a predetermined average amplitude substantially over one time interval from a number of time intervals, the amplitude determining input signal corresponding to at least one predetermined system state variable. The nonlinear controller component is operatively connected to receive as inputs at least one predetermined system state variable. A relationship between the amplitude determining input signal and at least one predetermined system state variable is obtained by a predetermined method.Type: GrantFiled: August 19, 2008Date of Patent: March 12, 2013Assignee: Maxim Integrated Products, Inc.Inventors: Paul W. Latham, John C. Canfield
-
Patent number: 8384363Abstract: A method and apparatus for converting a DC voltage to a lower DC voltage, provides for conducting current from an input terminal, through an inductor to charge a capacitor connected to the inductor at an output terminal and to provide a varying range of load current from the output terminal, alternately switching the input terminal between a supply voltage and a ground potential to produce a desired voltage at the output terminal that is lower than the supply voltage, while providing the varying range of load current, and disconnecting the input terminal from both the supply voltage and the ground potential to reduce an increase in voltage at the output terminal caused by a substantial reduction in the load current, while current through the inductor adjusts in response to the reduced load current.Type: GrantFiled: April 16, 2010Date of Patent: February 26, 2013Assignee: L&L Engineering, LLCInventors: Paul W. Latham, II, Stewart Kenly
-
Patent number: 8344716Abstract: Methods and systems, utilizing simplified digital hardware, for measuring parameters needed for control of a system (referred to as a plant) such as a power supply or motor. In one embodiment, the system for measuring the desired parameters includes simplified digital hardware to implement the functionality of transfer function measurement in the plant.Type: GrantFiled: November 20, 2009Date of Patent: January 1, 2013Assignee: L&L Engineering, LLCInventors: Stewart Kenly, Paul W. Latham, II
-
Patent number: 8285502Abstract: An inductor current estimator for a switching power supply includes a first sensing and averaging component that generates an average of a switch voltage and a second sensing and averaging component that generates an average of an output voltage of the switching power supply. A first subtraction component receives the average of the switch voltage and the average of the output voltage. A first multiplying component receives an output of the first subtraction component and multiplies the output of the first subtraction component by a first model parameter. A second multiplying component multiplies an input to the second multiplying component by a second model parameter. An adding component adds an output of the first multiplying component and an output of the second multiplying component. A delay component receives an output of the adding component and provides an output to an input of the second multiplying component.Type: GrantFiled: November 20, 2009Date of Patent: October 9, 2012Assignee: L&L Engineering, LLCInventors: Stewart Kenly, Paul W. Latham, II
-
Publication number: 20120249103Abstract: A first control system for a power supply includes a switch-mode DC-DC converter module and an FET gate drive module. The switch-mode DC-DC converter module receives an input voltage and generates first and second voltages, the first voltage powering a DC-DC control module. The FET gate drive module selectively drives a plurality of FETs of the power supply using the second voltage thereby generating a desired output voltage from the input voltage. A second control system is directed to driving the second voltage to a desired gate voltage, wherein the desire gate voltage is determined based on at least one of a plurality of operating parameters. A third control system includes controlling first and second voltages generated by a SIDO voltage converter based on the first and second voltages and a damping factor, and generating the damping factor based on current flowing through the inductor of the SIDO voltage converter.Type: ApplicationFiled: April 1, 2011Publication date: October 4, 2012Applicant: Maxim Integrated Products, Inc.Inventors: Paul W. Latham, II, Mansur B. Kiadeh, Sudha Durvasula
-
Publication number: 20120217376Abstract: Methods and apparatus are provided for performing multiple correlated double sampling (CDS) operations on an imaging pixel, and in some cases on an array of imaging pixels, during a single integration cycle of the pixel(s). The multiple CDS operations may produce multiple CDS values, which may be processed in combination to produce a resulting value substantially free of various types of noise. The CDS operations may be performed using a CDS circuit including a single-ended charge amplifier having an input capacitor. The charge amplifier may also include a variable capacitance providing a variable gain. The variable capacitance may be provided by a feedback capacitor.Type: ApplicationFiled: May 3, 2012Publication date: August 30, 2012Applicant: Infrared Newco, Inc.Inventors: BRYAN D. ACKLAND, Paul W. Latham, II, Joshua C. Park
-
Patent number: 8253402Abstract: In one embodiment, the method of these teachings includes decomposing the output ripple voltage into its constituent components and utilizing the scale factor necessary for this decomposition to obtain the measure capacitance and ESR for a power supply/converter.Type: GrantFiled: November 20, 2009Date of Patent: August 28, 2012Assignee: L&L Engineering, LLCInventors: Stewart Kenly, Paul W. Latham, II
-
Patent number: 8212543Abstract: Methods for selecting between the two modes (states) of operation, continuous conduction and discontinuous conduction, are disclosed. Systems that are capable of selecting the operating mode and operating in the continuous conduction mode or the discontinuous conduction mode are also disclosed.Type: GrantFiled: June 10, 2011Date of Patent: July 3, 2012Assignee: L&L Engineering, LLCInventors: Stewart Kenly, Paul W. Latham, II
-
Patent number: 8183902Abstract: In one embodiment, the digital pulse width modulator of these teachings includes comparators and a number of phases and capable of increasing resolution without increasing clock frequency. In another embodiment, the digital pulse width modulator (DPWM) of these teachings includes equality comparators and a number of phases and increases resolution without increasing clock frequency. A further embodiment of the system of these teachings includes a priority encoded comparator component (in one instance including a number of comparators) comparing duty cycle commands against preset minimums, that embodiment being referred to as a frequency Foldback component. Other embodiments and embodiments of the method of these teachings are also disclosed.Type: GrantFiled: November 21, 2011Date of Patent: May 22, 2012Assignee: Maxim Integrated Products, Inc.Inventors: Stewart Kenly, Paul W. Latham
-
Patent number: 8164320Abstract: A system includes a first switch connected to a voltage input and a switching node. A second switch is connected to the switching node and a reference potential. A first circuit generates first rising edges and first falling edges by comparing a voltage at the switching node to a first voltage reference. The first voltage reference is between the reference potential and the voltage input. A second circuit generates second rising edges and second falling edges by comparing the switching node voltage to a second voltage reference. The second voltage reference is less than the reference potential. The controller calculates delay times based on the first rising edges, the first falling edges, the second rising edges and the second falling edges. The controller generates drive signals for the first switch and the second switch based on a duty cycle and the delay times.Type: GrantFiled: January 24, 2011Date of Patent: April 24, 2012Assignee: Maxim Integrated Products, Inc.Inventors: Paul W. Latham, II, Stewart Kenly, Laszlo Balogh
-
Patent number: 8154264Abstract: Methods for selecting between the two modes (states) of operation, continuous conduction and discontinuous conduction, are disclosed. Systems that are capable of selecting the operating mode and operating in the continuous conduction mode or the discontinuous conduction mode are also disclosed.Type: GrantFiled: June 14, 2011Date of Patent: April 10, 2012Assignee: L&L Engineering, LLCInventors: Stewart Kenly, Paul W. Latham, II
-
Publication number: 20120062290Abstract: In one embodiment, the digital pulse width modulator of these teachings includes comparators and a number of phases and capable of increasing resolution without increasing clock frequency. In another embodiment, the digital pulse width modulator (DPWM) of these teachings includes equality comparators and a number of phases and increases resolution without increasing clock frequency. A further embodiment of the system of these teachings includes a priority encoded comparator component (in one instance including a number of comparators) comparing duty cycle commands against preset minimums, that embodiment being referred to as a frequency Foldback component. Other embodiments and embodiments of the method of these teachings are also disclosed.Type: ApplicationFiled: November 21, 2011Publication date: March 15, 2012Applicant: L&L Engineering, LLCInventors: Stewart Kenly, Paul W. Latham, II
-
Patent number: 8120401Abstract: In one embodiment, the digital pulse width modulator of these teachings includes comparators and a number of phases and capable of increasing resolution without increasing clock frequency. In another embodiment, the digital pulse width modulator (DPWM) of these teachings includes equality comparators and a number of phases and increases resolution without increasing clock frequency. A further embodiment of the system of these teachings includes a priority encoded comparator component (in one instance including a number of comparators) comparing duty cycle commands against preset minimums, that embodiment being referred to as a frequency Foldback component. Other embodiments and embodiments of the method of these teachings are also disclosed.Type: GrantFiled: November 20, 2009Date of Patent: February 21, 2012Assignee: L&L Engineering LLCInventors: Stewart Kenly, Paul W. Latham, II
-
Publication number: 20120038807Abstract: Methods and apparatus are provided for performing multiple correlated double sampling (CDS) operations on an imaging pixel, and in some cases on an array of imaging pixels, during a single integration cycle of the pixel(s). The multiple CDS operations may produce multiple CDS values, which may be processed in combination to produce a resulting value substantially free of various types of noise. The CDS operations may be performed using a CDS circuit including a single-ended charge amplifier having an input capacitor. The charge amplifier may also include a variable capacitance providing a variable gain. The variable capacitance may be provided by a feedback capacitor.Type: ApplicationFiled: October 25, 2011Publication date: February 16, 2012Applicant: Infrared Newco, Inc.Inventors: Bryan D. Ackland, Paul W. Latham, II, Joshua C. Park
-
Patent number: 8072525Abstract: Methods and apparatus are provided for performing multiple correlated double sampling (CDS) operations on an imaging pixel, and in some cases on an array of imaging pixels, during a single integration cycle of the pixel(s). The multiple CDS operations may produce multiple CDS values, which may be processed in combination to produce a resulting value substantially free of various types of noise. The CDS operations may be performed using a CDS circuit including a single-ended charge amplifier having an input capacitor. The charge amplifier may also include a variable capacitance providing a variable gain. The variable capacitance may be provided by a feedback capacitor.Type: GrantFiled: June 18, 2008Date of Patent: December 6, 2011Assignee: Infrared Newco, Inc.Inventors: Bryan D. Ackland, Paul W. Latham, II, Joshua C. Park
-
Patent number: 8063422Abstract: MOS imaging pixels are described. The MOS imaging pixels may comprise bootstrapped source followers, having their bodies connected to their sources. The source followers of the MOS imaging pixels may be used to buffer a signal indicative of an amount of radiation incident on the pixel. MOS imagers are also described, which may comprise one or more MOS imaging pixels of the type described.Type: GrantFiled: April 25, 2008Date of Patent: November 22, 2011Assignee: Infrared Newco, Inc.Inventors: Bryan D. Ackland, Conor S. Rafferty, Paul W. Latham, II