Patents by Inventor Paul W. Rohwer

Paul W. Rohwer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System and method for storing a tag to identify a functional storage location in a memory device
    Patent number: 6496876
    Abstract: Dysfunctional storage locations in a memory device may be demarcated by identifying a first and second dysfunctional storage location in the memory device, and storing a first tag before the first identified storage location, the first tag indicating a storage location immediately after the second identified storage location. A second tag may be used to demarcate functional storage locations by identify a functional storage location, and storing a second tag at the identified functional storage location, the second tag indicating a storage location immediately preceding the first identified dysfunctional storage location.
    Type: Grant
    Filed: December 21, 1998
    Date of Patent: December 17, 2002
    Assignee: Micron Technology, Inc.
    Inventor: Paul W. Rohwer
  • Method for using fuse identification codes for masking bad bits on memory modules
    Patent number: 6009536
    Abstract: A new method for masking off failing memory locations on a Single In-line Memory Module (SIMM) involves reading out identification (ID) codes fused in individual DRAMs. The ID codes are used to index stored fail maps taken from the DRAMs prior to their assembly onto a SIMM. After all failing locations of all of the DRAMs located on a single SIMM are determined, the SIMM is then programmed to re-route these locations to auxiliary memory located on the SIMM.
    Type: Grant
    Filed: September 20, 1996
    Date of Patent: December 28, 1999
    Assignee: Micron Electronics, Inc.
    Inventor: Paul W. Rohwer
  • Method for using fuse identification codes for masking bad bits on single in-line memory modules
    Patent number: 5913020
    Abstract: A new method for masking off failing memory locations on a Single In-line Memory Module (SIMM) involves reading out identification (ID) codes fused in individual DRAMs. The ID codes are used to index stored fail maps taken from the DRAMs prior to their assembly onto a SIMM. After all failing locations of all of the DRAMs located on a single SIMM are determined, the SIMM is then programmed to re-route these locations to auxiliary memory located on the SIMM.
    Type: Grant
    Filed: August 22, 1997
    Date of Patent: June 15, 1999
    Assignee: Micron Electronics, Inc.
    Inventor: Paul W. Rohwer