Patents by Inventor Paul W. T. Heller

Paul W. T. Heller has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5832240
    Abstract: An ISDN interface is provided on a card, which is adapted for mounting in a terminal computer and which is operable to exchange data with a terminal computer and an ISDN. The ISDN interface card includes a protocol processor that is programmable to process data encoded in accordance with a number of different protocols and a digital signal processor that is programmable for data compression, encryption and facsimile applications, and u-law and a-law conversion, among other applications. The ISDN card dynamically allocates data calls between one or two B-channels to achieve a data transmission rate of 128 kbps. A power supply with a ring generator is provided to allow for the use of an analog telephone with the ISDN card. The ISDN card is programmable to allow users to create customized screens for various call processes, and to allow for the updating of a flash ROM coupled to the protocol processor through the terminal computer and the ISDN.
    Type: Grant
    Filed: April 28, 1997
    Date of Patent: November 3, 1998
    Inventors: Allen J Larsen, Jennifer K. Hergert, Charles D. Brown, William C. Cross, Ronald E. Dove, Paul W. T. Heller
  • Patent number: 5412800
    Abstract: A method and apparatus for executing any one of a plurality of computer programs for operation of a single output device in a computer system through the control of parameters loaded in registers in the system, the computer system having program compatibility requirements for programs to be executed, includes commencing execution of each of the programs as if it were compatible with said system program compatibility requirements, and modifying the results of any attempts by the program being executed to directly load the register parameters controlling the output device if the loading attempts are non-compatible with the system program compatibility requirements, the modification making the results of the loading attempts system compatible.
    Type: Grant
    Filed: October 8, 1993
    Date of Patent: May 2, 1995
    Assignee: Cirrus Logic, Inc.
    Inventors: Vlad Bril, Paul W. T. Heller
  • Patent number: 5032981
    Abstract: An addressing technique for transparently managing assignment of memory storage locations in a memory having a total capacity of T bytes for a computer operating system, the operating system having a number M of bytes of storage allocated thereto in the system memory map for storage of the operating system, involves assigning a number N of bytes of memory storage locations for storage of a core portion of the operating system, the number N being less than M, assigning a number S of blocks of additional memory storage locations in the memory, each of the S blocks of memory storage having a capacity of R bytes, where N+R=M; storing the portions of the operating system in addition to the core portion in the S number of blocks of the memory storage locations; retrieving one of the blocks S of the operating system from the memory storage; and retrieving the N number of bytes of the core portion of the operating system from memory storage, and utilizing the retrieved one of the blocks S with the retrieved number N
    Type: Grant
    Filed: April 10, 1989
    Date of Patent: July 16, 1991
    Assignee: Cirrus Logic, Inc.
    Inventors: Vlad Bril, Paul W. T. Heller, Keith H. Uhlin