Abstract: To eliminate signal loss and sources of signal attenuation, a connection methodology is utilized which enables high-speed signals to be directly communicated from particular integrated circuits housed on a printed circuit board, to other locations within a system. More specifically, a signal escape strategy directly connects a high-speed cable to a point on the circuit board which is very close to the integrated circuit itself. A back-side connection methodology is utilized so that electrical signals pass directly from the integrated circuit through a via, to a connection point on the backside of the circuit board. To accommodate this connection, a specially designed interposer and related paddle cards are utilized so the high-speed communication cable can be easily attached.

Abstract: A printed circuit board includes additional stitching vias placed at strategic location within a connection matrix, which provides additional isolation and further accommodates high-speed communication capabilities. The stitching vias have a variable length or depth, depending on related structures within the circuit board, so as to avoid any interference with underlining escape routing, or alternative signal transmission structures. More specifically, these stitching vias help to eliminate cross-talk in the via field caused by the close proximity of signal carrying structures. Further, differential signal communication is better accommodated based upon this reduction in cross-talk.

Abstract: To eliminate signal loss and sources of signal attenuation, a connection methodology is utilized which enables high-speed signals to be directly communicated from particular integrated circuits housed on a printed circuit board, to other locations within a system. More specifically, a signal escape strategy directly connects a high-speed cable to a point on the circuit board which is very close to the integrated circuit itself. A back-side connection methodology is utilized so that electrical signals pass directly from the integrated circuit through a via, to a connection point on the backside of the circuit board. To accommodate this connection, a specially designed interposer and related paddle cards are utilized so the high-speed communication cable can be easily attached.

Abstract: The various structures forming communication paths on a printed circuit board can create several undesired effects, especially when high frequency signals are considered. Non-functional pads created during the manufacturing process have the potential to create an undesired effect, but when the overall collection of non-functional pads are carefully configured, an optimized communication path can be formed. More specifically, by selectively removing some collection of the non-functional pads, the high frequency characteristics of the communication paths can be optimized.

Abstract: The various structures forming communication paths on a printed circuit board can create several undesired effects, especially when high frequency signals are considered. Non-functional pads created during the manufacturing process have the potential to create an undesired effect, but when the overall collection of non-functional pads are carefully configured, an optimized communication path can be formed. More specifically, by selectively removing some collection of the non-functional pads, the high frequency characteristics of the communication paths can be optimized.

Abstract: A system, method, and computer program product are provided for discarding pixel samples. The method includes the steps of completing shading operations for a pixel set including one or more pixels to generate per-sample shaded attributes according to a shader program executed by a processing pipeline. Discard information for the pixel set is evaluated and one or more per-sample shaded attributes for at least one pixel in the pixel set are discarded based on the evaluated discard information.

Abstract: A system, method, and computer program product are provided for discarding pixel samples. The method includes the steps of completing shading operations for a pixel set including one or more pixels to generate per-sample shaded attributes according to a shader program executed by a processing pipeline. Discard information for the pixel set is evaluated and one or more per-sample shaded attributes for at least one pixel in the pixel set are discarded based on the evaluated discard information.

Abstract: An intuitive precharge sequencing technique for improving memory access through elimination of delay time incurred through precharging during page mode access of DRAM type memory. Current and prior page address access request information is used to generate a prediction as to whether the next address request will cross a page boundary and, therefore, require precharging of a new page. The predicted new page is then precharged before access is requested. Further advantages are obtained by providing an enable/disable feature, which allows either software or hardware to initiate or deactivate the operation of the precharge request in association with current or historical operating characteristics for a particular processor or program tasks. Where desired or practical, multiple levels of predictive analysis are used to refine the accuracy of trend predictions.