Patents by Inventor Paul Zagacki

Paul Zagacki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8347127
    Abstract: A technique to adjust a processor's operating voltage dynamically while preventing a user from placing the processor into a harmful operating voltage state in relation to the core/bus frequency ratio of the processor. More particularly, embodiments of the invention relate to a technique to control the operating voltage of the processor as a function of the processor's bus and/or core clock frequency.
    Type: Grant
    Filed: February 10, 2011
    Date of Patent: January 1, 2013
    Assignee: Intel Corporation
    Inventor: Paul Zagacki
  • Publication number: 20110138212
    Abstract: A technique to adjust a processor's operating voltage dynamically while preventing a user from placing the processor into a harmful operating voltage state in relation to the core/bus frequency ratio of the processor. More particularly, embodiments of the invention relate to a technique to control the operating voltage of the processor as a function of the processor's bus and/or core clock frequency.
    Type: Application
    Filed: February 10, 2011
    Publication date: June 9, 2011
    Inventor: Paul Zagacki
  • Patent number: 7913099
    Abstract: A technique to adjust a processor's operating voltage dynamically while preventing a user from placing the processor into a harmful operating voltage state in relation to the core/bus frequency ratio of the processor. More particularly, embodiments of the invention relate to a technique to control the operating voltage of the processor as a function of the processor's bus and/or core clock frequency.
    Type: Grant
    Filed: August 8, 2007
    Date of Patent: March 22, 2011
    Assignee: Intel Corporation
    Inventor: Paul Zagacki
  • Patent number: 7308590
    Abstract: A technique to adjust a processor's operating voltage dynamically while preventing a user from placing the processor into a harmful operating voltage state in relation to the core/bus frequency ratio of the processor. More particularly, embodiments of the invention relate to a technique to control the operating voltage of the processor as a function of the processor's bus and/or core clock frequency.
    Type: Grant
    Filed: October 15, 2004
    Date of Patent: December 11, 2007
    Assignee: Intel Corporation
    Inventor: Paul Zagacki
  • Publication number: 20070283177
    Abstract: A technique to adjust a processor's operating voltage dynamically while preventing a user from placing the processor into a harmful operating voltage state in relation to the core/bus frequency ratio of the processor. More particularly, embodiments of the invention relate to a technique to control the operating voltage of the processor as a function of the processor's bus and/or core clock frequency.
    Type: Application
    Filed: August 8, 2007
    Publication date: December 6, 2007
    Inventor: Paul Zagacki
  • Publication number: 20060085660
    Abstract: A technique to adjust a processor's operating voltage dynamically while preventing a user from placing the processor into a harmful operating voltage state in relation to the core/bus frequency ratio of the processor. More particularly, embodiments of the invention relate to a technique to control the operating voltage of the processor as a function of the processor's bus and/or core clock frequency.
    Type: Application
    Filed: October 15, 2004
    Publication date: April 20, 2006
    Inventor: Paul Zagacki
  • Patent number: 6976099
    Abstract: A method of and apparatus for selective delivery of an interrupt to one of multiple processors having independent operating systems is described. The interrupts are generated from various platform devices in the computer system. Depending on the mode of operation of the system, a controller is configured to deliver interrupts to a co-processor when the host processor is off, without turning on the host processor. The interrupt may be delivered to the correct processor using wither a bus-based message or a dedicated interrupt line.
    Type: Grant
    Filed: June 9, 2004
    Date of Patent: December 13, 2005
    Assignee: Intel Corporation
    Inventors: Varghese George, Edward Gamsaragan, Vladimir M. Pentkovski, Deep K. Buch, Paul Zagacki
  • Patent number: 6772241
    Abstract: A method of and apparatus for selective delivery of an interrupt to one of multiple processors having independent operating systems is described. The interrupts are generated from various platform devices in the computer system. Depending on the mode of operation of the system, a controller is configured to deliver interrupts to a co-processor when the host processor is off, without turning on the host processor. The interrupt may be delivered to the correct processor using either a bus-based message or a dedicated interrupt line.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: August 3, 2004
    Assignee: Intel Corporation
    Inventors: Varghese George, Edward Gamsaragan, Vladimir M. Pentkovski, Deep K. Buch, Paul Zagacki
  • Patent number: 6748512
    Abstract: A Method and Apparatus for Mapping Address Space of Integrated Programmable Devices within Host System Memory is described herein.
    Type: Grant
    Filed: December 8, 2000
    Date of Patent: June 8, 2004
    Assignee: Intel Corporation
    Inventors: Deep Buch, Varghese George, Vladimir Pentkovski, Paul Zagacki, Edward Gamsaragan
  • Publication number: 20020073264
    Abstract: An Integrated Co-Processor Configured as a PCI Device is described herein.
    Type: Application
    Filed: December 8, 2000
    Publication date: June 13, 2002
    Inventors: Varghese George, Vladimir Pentkovski, Deep Buch, Paul Zagacki, Edward Gamsaragan
  • Publication number: 20020073296
    Abstract: A Method and Apparatus for Mapping Address Space of Integrated Programmable Devices within Host System Memory is described herein.
    Type: Application
    Filed: December 8, 2000
    Publication date: June 13, 2002
    Inventors: Deep Buch, Varghese George, Vladimir Pentkovski, Paul Zagacki, Edward Gamsaragan