Abstract: An apparatus and method for implementing a Level 0 cache within a cache subsystem. For example, one embodiment of a processor comprises: a cache subsystem comprising a Level-0 cache; a scheduler to schedule a load operation indicating data to be loaded; and a load hit predictor to predict whether the data indicated by the load operation is stored in the LO cache and to generate a wakeup signal to the scheduler in response to predicting that the data is stored in the LO cache. Some implementations perform store forwarding in response to load operations using a multi-step approach in which a partial linear address check is performed to determine load operations which are eligible for store forwarding. A full address check is performed for those load operations which are eligible in which the address of the load is compared against the address of a youngest older store operation.

Abstract: A pet bed system has an overlay removably secured to a pet bed. The pet bed has a top surface for supporting a recumbent pet within a supportive area, a basal area, and a transition area between the supportive area and the basal area. The overlay has a protective area generally disposed upon the supportive area of the top surface, and a plurality of extension areas extending from the protective area and overlapping the transition area of the pet bed while exposing portions of the top surface. The pet bed and the extension areas may be provided with mating attachment members to removably secure the overlay to the pet bed. A great variety of different types of attachment members are suitable. Alternatively, the extension areas may be joined by an elastic section to removably secure the overlay to the pet bed by compression. The overlay may be washable for reuse or disposable. A kit may be used to retrofit the overlay to a pet bed.