Patents by Inventor Pauline N. Jacob

Pauline N. Jacob has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6808993
    Abstract: An in-situ ultra dilute ammonia nitridation process and apparatus of the following ultra-thin chemically tailored gate dielectrics: DCE/O2 (Trans 1,2-Dichloroethylene) based ultra-thin gate dielectric; Nitric Oxide (NO) based ultra-thin gate dielectric that has been re-oxidized via a DCE/O2 (Trans 1,2-Dichloroethylene) process; “dry-wet” DCE (Trans 1,2-Dichloroethylene)/O2-H2O/O2) based ultra-thin gate dielectric; and ultra dilute, less than 1E-7 moles NH3/mm2, nitridation of an ultra-thin gate dielectric. A vertical diffusion furnace (VDF) is provided to process the same. The ultra-thin chemically tailored gate dielectrics generated in a VDF with ultra-dilute NH3, below 1E-7 moles NH3/mm2, in-situ nitridation show a performance comparable or better to traditional ex-situ rapid thermal anneal (RTA) processing techniques for 90 nm CMOS technology.
    Type: Grant
    Filed: January 8, 2003
    Date of Patent: October 26, 2004
    Assignee: Intel Corporation
    Inventors: Christine M. Finnie, Pauline N. Jacob, Nick Lindert, Keith M. Jackson, Kirk Althoff, Jack Hwang, Jack Kavalieros, James R. Mueller
  • Publication number: 20040152287
    Abstract: An amorphous or polycrystalline silicon film that does not facilitate the reduction of neighboring oxide may be deposited during semiconductor device/integrated circuit fabrication.
    Type: Application
    Filed: January 31, 2003
    Publication date: August 5, 2004
    Inventors: Adrian B. Sherrill, Weimin Han, Pauline N. Jacob
  • Publication number: 20040132316
    Abstract: An in-situ ultra dilute ammonia nitridation process and apparatus of the following ultra-thin chemically tailored gate dielectrics: DCE/O2 (Trans 1,2-Dichloroethylene) based ultra-thin gate dielectric; Nitric Oxide (NO) based ultra-thin gate dielectric that has been re-oxidized via a DCE/O2 (Trans 1,2-Dichloroethylene) process; “dry-wet” DCE (Trans 1,2-Dichloroethylene)/O2-H2O/O2) based ultra-thin gate dielectric; and ultra dilute, less than 1E-7 moles NH3/mm2, nitridation of an ultra-thin gate dielectric. A vertical diffusion furnace (VDF) is provided to process the same. The ultra-thin chemically tailored gate dielectrics generated in a VDF with ultra-dilute NH3, below 1E-7 moles NH3/mm2, in-situ nitridation show a performance comparable or better to traditional ex-situ rapid thermal anneal (RTA) processing techniques for 90 nm CMOS technology.
    Type: Application
    Filed: January 8, 2003
    Publication date: July 8, 2004
    Inventors: Christine M. Finnie, Pauline N. Jacob, Nick Lindert, Keith M. Jackson, Kirk Althoff, Jack Hwang, Jack Kavalieros, James R. Mueller