Patents by Inventor Paulus Hendricus Lodewijk Maria Schram

Paulus Hendricus Lodewijk Maria Schram has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Asynchronous phase acquisition unit with dithering
    Patent number: 7619483
    Abstract: A digital phase locked loop includes a phase acquisition unit receiving a sampled input signal and applying its output to a first input of a digital phase detector, a digital controlled oscillator producing a digital output, and a feedback path coupling the digital output of the digital controlled oscillator to a second input of the digital phase detector in the digital domain. The input signal may be sampled asynchronously.
    Type: Grant
    Filed: November 14, 2007
    Date of Patent: November 17, 2009
    Assignee: Zarlink Semiconductor Inc.
    Inventors: Robertus Laurentius van der Valk, Paulus Hendricus Lodewijk Maria Schram, Douglas Robert Sitch
  • Fractional digital PLL
    Patent number: 7557624
    Abstract: A phase locked loop provides an output frequency that bears a fractional relationship to an input frequency and includes a controlled oscillator for generating the output frequency. The phase information is scaled in the amplitude domain to provide the fractional relationship.
    Type: Grant
    Filed: November 15, 2007
    Date of Patent: July 7, 2009
    Assignee: Zarlink Semiconductor Inc.
    Inventors: Robertus Laurentius van der Valk, Paulus Hendricus Lodewijk Maria Schram, Johannes Hermanus Aloysius de Rijk
  • FRACTIONAL DIGITAL PLL
    Publication number: 20080122504
    Abstract: A phase locked loop provides an output frequency that bears a fractional relationship to an input frequency and includes a controlled oscillator for generating the output frequency. The phase information is scaled in the amplitude domain to provide the fractional relationship.
    Type: Application
    Filed: November 15, 2007
    Publication date: May 29, 2008
    Applicant: ZARLINK SEMICONDUCTOR INC.
    Inventors: Robertus Laurentius van der Valk, Paulus Hendricus Lodewijk Maria Schram, Johannes Hermanus Aloysius de Rijk
  • DIGITAL PHASE LOCKED LOOP
    Publication number: 20080116982
    Abstract: A digital phase locked loop includes a phase acquisition unit for producing a digital representation of the phase of a reference signal, a digital phase detector having a first input receiving a digital signal from, or derived from, the output of the phase acquisition unit, digital loop filter filtering the output of the digital phase detector, and a digital controlled oscillator generating an output signal under the control of the digital loop filter. A digital feedback loop provides a second input to the digital phase detector from the output of the digital controlled oscillator.
    Type: Application
    Filed: November 14, 2007
    Publication date: May 22, 2008
    Applicant: ZARLINK SEMICONDUCTOR INC.
    Inventors: Robertus Laurentius van der Valk, Paulus Hendricus Lodewijk Maria Schram, Johannes Hermanus Aloysius de Rijk
  • ASYNCHRONOUS PHASE ACQUISITION UNIT WITH DITHERING
    Publication number: 20080116980
    Abstract: A digital phase locked loop includes a phase acquisition unit receiving a sampled input signal and applying its output to a first input of a digital phase detector, a digital controlled oscillator producing a digital output, and a feedback path coupling the digital output of the digital controlled oscillator to a second input of the digital phase detector in the digital domain. The input signal may be sampled asynchronously.
    Type: Application
    Filed: November 14, 2007
    Publication date: May 22, 2008
    Applicant: ZARLINK SEMICONDUCTOR INC.
    Inventors: Robertus Laurentius van der Valk, Paulus Hendricus Lodewijk Maria Schram, Douglas Robert Sitch