Patents by Inventor Pavan Gavvala

Pavan Gavvala has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210216480
    Abstract: An information handling system includes a first graphics processing unit (GPU) with a first high-speed interface, a second GPU with a second high-speed interface coupled to the first high-speed interface, and a baseboard management controller (BMC). The first GPU is configured to receive a command to provide management data to the BMC, and to provide first management data associated with the first GPU to the first GPU via the first high-speed interface in response to receiving the command. The second GPU is configured to receive the command, to receive the first management data via the second high-speed interface in response to receiving the command, and to provide the first management data and second management data associated with the second GPU to the BMC in further response to the command.
    Type: Application
    Filed: January 9, 2020
    Publication date: July 15, 2021
    Inventors: Chitrak Gupta, Rama Bisa, Rajeshkumar Patel, Chandrasekhar Puthilathe, John R. Palmer, Akkiah Maddukuri, Pavan Gavvala
  • Patent number: 11061838
    Abstract: An information handling system includes a first graphics processing unit (GPU) with a first high-speed interface, a second GPU with a second high-speed interface coupled to the first high-speed interface, and a baseboard management controller (BMC). The first GPU is configured to receive a command to provide management data to the BMC, and to provide first management data associated with the first GPU to the first GPU via the first high-speed interface in response to receiving the command. The second GPU is configured to receive the command, to receive the first management data via the second high-speed interface in response to receiving the command, and to provide the first management data and second management data associated with the second GPU to the BMC in further response to the command.
    Type: Grant
    Filed: January 9, 2020
    Date of Patent: July 13, 2021
    Assignee: Dell Products L.P.
    Inventors: Chitrak Gupta, Rama Bisa, Rajeshkumar Patel, Chandrasekhar Puthilathe, John R. Palmer, Akkiah Maddukuri, Pavan Gavvala
  • Patent number: 10996942
    Abstract: An information handling system includes a processor, a graphics processing unit (GPU) including an interrupt interface coupled to the processor, and a low-speed interface, and a baseboard management controller (BMC) coupled to the low-speed interface. The GPU is configured to receive a first command from the BMC via the low-speed interface to halt processing data, to send a first interrupt to the processor via the interrupt interface in response to receiving the first command, to determine that the processor has halted sending data to the first GPU in response to the first interrupt, and to send a first reply to the command in response to determining that the processor has halted sending data. The BMC is configured to reboot the first GPU without rebooting the processor in response to receiving the first reply.
    Type: Grant
    Filed: January 21, 2020
    Date of Patent: May 4, 2021
    Assignee: Dell Products L.P.
    Inventors: Rama Bisa, Pavan Gavvala, Chitrak Gupta, Rajeshkumar Patel, Akkiah Maddukuri