Patents by Inventor Pavan Kumar Reddy Aella

Pavan Kumar Reddy Aella has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor devices including stack oxide materials having different densities or different oxide portions, and semiconductor devices including stack dielectric materials having different portions
    Patent number: 11889693
    Abstract: Semiconductor structures may include a stack of alternating dielectric materials and control gates, charge storage structures laterally adjacent to the control gates, a charge block material between each of the charge storage structures and the laterally adjacent control gates, and a pillar extending through the stack of alternating oxide materials and control gates. Each of the dielectric materials in the stack has at least two portions of different densities and/or different rates of removal. Also disclosed are methods of fabricating such semiconductor structures.
    Type: Grant
    Filed: July 2, 2021
    Date of Patent: January 30, 2024
    Inventors: Srikant Jayanti, Fatma Arzum Simsek-Ege, Pavan Kumar Reddy Aella
  • MEMORY CELLS HAVING INCREASED STRUCTURAL STABILITY
    Publication number: 20220263019
    Abstract: A memory cell can include a top lamina layer, a bottom lamina layer, and a phase change material (PCM) layer between the top lamina layer and the bottom lamina layer. The PCM layer can have a top surface in direct contact with the top lamina layer and a bottom surface in direct contact with the bottom lamina layer. The top surface of the PCM layer and the bottom surface of the PCM layer can have a structurally stabilizing width ratio.
    Type: Application
    Filed: April 29, 2022
    Publication date: August 18, 2022
    Applicant: Intel Corporation
    Inventors: Pavan Kumar Reddy Aella, Kolya Yastrebenetsky, Masuji Honjo
  • Memory cells having increased structural stability
    Patent number: 11367833
    Abstract: A memory cell can include a top lamina layer, a bottom lamina layer, and a phase change material (PCM) layer between the top lamina layer and the bottom lamina layer. The PCM layer can have a top surface in direct contact with the top lamina layer and a bottom surface in direct contact with the bottom lamina layer. The top surface of the PCM layer and the bottom surface of the PCM layer can have a structurally stabilizing width ratio.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: June 21, 2022
    Assignee: Intel Corporation
    Inventors: Pavan Kumar Reddy Aella, Kolya Yastrebenetsky, Masuji Honjo
  • SEMICONDUCTOR DEVICES INCLUDING STACK OXIDE MATERIALS HAVING DIFFERENT DENSITIES OR DIFFERENT OXIDE PORTIONS, AND SEMICONDUCTOR DEVICES INCLUDING STACK DIELECTRIC MATERIALS HAVING DIFFERENT PORTIONS
    Publication number: 20210335815
    Abstract: Semiconductor structures may include a stack of alternating dielectric materials and control gates, charge storage structures laterally adjacent to the control gates, a charge block material between each of the charge storage structures and the laterally adjacent control gates, and a pillar extending through the stack of alternating oxide materials and control gates. Each of the dielectric materials in the stack has at least two portions of different densities and/or different rates of removal. Also disclosed are methods of fabricating such semiconductor structures.
    Type: Application
    Filed: July 2, 2021
    Publication date: October 28, 2021
    Inventors: Srikant Jayanti, Fatma Arzum Simsek-Ege, Pavan Kumar Reddy Aella
  • Semiconductor structures including dielectric materials having differing removal rates
    Patent number: 11063059
    Abstract: Semiconductor structures may include a stack of alternating dielectric materials and control gates, charge storage structures laterally adjacent to the control gates, a charge block material between each of the charge storage structures and the laterally adjacent control gates, and a pillar extending through the stack of alternating oxide materials and control gates. Each of the dielectric materials in the stack has at least two portions of different densities and/or different rates of removal. Also disclosed are methods of fabricating such semiconductor structures.
    Type: Grant
    Filed: August 1, 2018
    Date of Patent: July 13, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Srikant Jayanti, Fatma Arzum Simsek-Ege, Pavan Kumar Reddy Aella
  • MEMORY CELLS HAVING INCREASED STRUCTURAL STABILITY
    Publication number: 20190044061
    Abstract: A memory cell can include a top lamina layer, a bottom lamina layer, and a phase change material (PCM) layer between the top lamina layer and the bottom lamina layer. The PCM layer can have a top surface in direct contact with the top lamina layer and a bottom surface in direct contact with the bottom lamina layer. The top surface of the PCM layer and the bottom surface of the PCM layer can have a structurally stabilizing width ratio.
    Type: Application
    Filed: September 28, 2018
    Publication date: February 7, 2019
    Applicant: Intel Corporation
    Inventors: Pavan Kumar Reddy Aella, Kolya Yastrebenetsky, Masuji Honjo
  • SEMICONDUCTOR STRUCTURES INCLUDING DIELECTRIC MATERIALS HAVING DIFFERING REMOVAL RATES
    Publication number: 20180337195
    Abstract: Semiconductor structures may include a stack of alternating dielectric materials and control gates, charge storage structures laterally adjacent to the control gates, a charge block material between each of the charge storage structures and the laterally adjacent control gates, and a pillar extending through the stack of alternating oxide materials and control gates. Each of the dielectric materials in the stack has at least two portions of different densities and/or different rates of removal. Also disclosed are methods of fabricating such semiconductor structures.
    Type: Application
    Filed: August 1, 2018
    Publication date: November 22, 2018
    Inventors: Srikant Jayanti, Fatma Arzum Simsek-Ege, Pavan Kumar Reddy Aella
  • Semiconductor structures including dielectric materials having differing removal rates
    Patent number: 10103160
    Abstract: Semiconductor structures may include a stack of alternating dielectric materials and control gates, charge storage structures laterally adjacent to the control gates, a charge block material between each of the charge storage structures and the laterally adjacent control gates, and a pillar extending through the stack of alternating oxide materials and control gates. Each of the dielectric materials in the stack has at least two portions of different densities and/or different rates of removal. Also disclosed are methods of fabricating such semiconductor structures.
    Type: Grant
    Filed: February 2, 2016
    Date of Patent: October 16, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Srikant Jayanti, Fatma Arzum Simsek-Ege, Pavan Kumar Reddy Aella
  • SEMICONDUCTOR STRUCTURES INCLUDING DIELECTRIC MATERIALS HAVING DIFFERING REMOVAL RATES
    Publication number: 20160148949
    Abstract: Semiconductor structures may include a stack of alternating dielectric materials and control gates, charge storage structures laterally adjacent to the control gates, a charge block material between each of the charge storage structures and the laterally adjacent control gates, and a pillar extending through the stack of alternating oxide materials and control gates. Each of the dielectric materials in the stack has at least two portions of different densities and/or different rates of removal. Also disclosed are methods of fabricating such semiconductor structures.
    Type: Application
    Filed: February 2, 2016
    Publication date: May 26, 2016
    Inventors: Srikant Jayanti, Fatma Arzum Simsek-Ege, Pavan Kumar Reddy Aella
  • Methods of fabricating semiconductor structures
    Patent number: 9275909
    Abstract: Semiconductor structures may include a stack of alternating dielectric materials and control gates, charge storage structures laterally adjacent to the control gates, a charge block material between each of the charge storage structures and the laterally adjacent control gates, and a pillar extending through the stack of alternating oxide materials and control gates. Each of the dielectric materials in the stack has at least two portions of different densities and/or different rates of removal. Also disclosed are methods of fabricating such semiconductor structures.
    Type: Grant
    Filed: August 12, 2013
    Date of Patent: March 1, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Srikant Jayanti, Fatma Arzum Simsek-Ege, Pavan Kumar Reddy Aella
  • SEMICONDUCTOR STRUCTURES AND METHODS OF FABRICATION OF SAME
    Publication number: 20150041879
    Abstract: Semiconductor structures may include a stack of alternating dielectric materials and control gates, charge storage structures laterally adjacent to the control gates, a charge block material between each of the charge storage structures and the laterally adjacent control gates, and a pillar extending through the stack of alternating oxide materials and control gates. Each of the dielectric materials in the stack has at least two portions of different densities and/or different rates of removal. Also disclosed are methods of fabricating such semiconductor structures.
    Type: Application
    Filed: August 12, 2013
    Publication date: February 12, 2015
    Applicant: Micron Technology, Inc.
    Inventors: Srikant Jayanti, Fatma Arzum Simsek-Ege, Pavan Kumar Reddy Aella