Patents by Inventor Pavel Aseev
Pavel Aseev has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240107897Abstract: A fabrication method comprising: forming a mask of an amorphous material over a crystalline surface of a substrate, the mask having a pattern of openings defining areas of an active region in which one or more components of one or more active devices are to be formed, the mask further defining a non-active region in which no active devices are to be formed; and forming a deposition material through the mask by an epitaxial growth process. The deposition material thus forms in the openings of the active region. The pattern of openings through the mask further comprises one or more reservoirs formed in the non-active region, each of the reservoirs being connected by the pattern of openings in the mask to at least one of the areas in the active region, and the deposition material forming in the reservoirs as part of the epitaxial growth.Type: ApplicationFiled: September 10, 2019Publication date: March 28, 2024Applicant: Microsoft Technology Licensing, LLCInventors: Pavel ASEEV, Philippe CAROFF-GAONAC'H, Leonardus Petrus KOUWENHOVEN
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Publication number: 20230106283Abstract: A shadow wall for controlling directional deposition of a material is arranged on a substrate. The shadow wall comprises a base portion and a bridge portion. The base portion is arranged on the substrate and is configured to support the bridge portion. The bridge portion overhangs the substrate. The shadow wall may have improved compatibility with non-directional deposition processes, because adatoms on the surface of the substrate may diffuse under the bridge. Also provided are a method of fabricating a device using the shadow wall, and a method of fabricating the shadow wall.Type: ApplicationFiled: February 28, 2020Publication date: April 6, 2023Applicant: Microsoft Technology Licensing, LLCInventors: Elvedin MEMISEVIC, Amrita SINGH, Pavel ASEEV
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Patent number: 11588093Abstract: There is provided a method for fabricating a device. On a top surface of a substrate, a first layer of a first deposition material is formed. The first layer of the first deposition material is patterned to create a seed pattern of remaining first deposition material. Homoepitaxy is used to grow a second layer of the first deposition material on the seed pattern.Type: GrantFiled: July 29, 2019Date of Patent: February 21, 2023Assignee: Microsoft Technology Licensing, LLCInventors: Pavel Aseev, Philippe Caroff-Gaonac'h
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Publication number: 20230008296Abstract: A method of fabricating a hollow wall for controlling directional deposition of material comprises: forming a layer of resist on a substrate; removing a portion of the resist selectively to form a channel in the resist; forming a layer of an amorphous dielectric material in the channel; and removing the resist to form the hollow wall. The channel has a front surface configured to prevent bending of a corresponding front face of the hollow wall. The hollow wall is useful for controlling deposition of material when fabricating semiconductor-superconductor hybrid devices, for example. By configuring the channel appropriately, bending of the hollow wall can be prevented, allowing for more precise deposition of material. Also provided is a further method of fabricating a hollow wall; and a method of fabricating a device using the hollow walls.Type: ApplicationFiled: December 5, 2019Publication date: January 12, 2023Applicant: Microsoft Technology Licensing, LLCInventors: Pavel ASEEV, Ekaterina CHERNYSHEVA, Amrita SINGH, Guanzhong WANG
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Publication number: 20220263008Abstract: There is provided a method for fabricating a device. On a top surface of a substrate, a first layer of a first deposition material is formed. The first layer of the first deposition material is patterned to create a seed pattern of remaining first deposition material. Homoepitaxy is used to grow a second layer of the first deposition material on the seed pattern.Type: ApplicationFiled: July 29, 2019Publication date: August 18, 2022Applicant: Microsoft Technology Licensing, LLCInventors: Pavel Aseev, Philippe Caroff-Gaonac'h
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Patent number: 11404624Abstract: In a masking phase, a first segment of an amorphous mask is formed on an underlying layer of a substrate. The first segment comprises a first set of trenches exposing the underlying layer. In the masking phase, a second segment of the amorphous mask is formed on the underlying layer. The second segment comprises a second set of trenches exposing the underlying layer. The segments are non-overlapping. An open end of one of the first set of trenches faces an open end of one of the second set of trenches, but the ends are separated by a portion of the amorphous mask. In a semiconductor growth phase, semiconductor material is grown, by selective area growth, in the first and second sets of trenches to form first and second sub-networks of nanowires on the underlying layer. The first and second sub-networks of nanowires are joined to form a single nanowire network.Type: GrantFiled: September 11, 2020Date of Patent: August 2, 2022Assignee: Microsoft Technology Licensing, LLCInventors: Pavel Aseev, Philippe Caroff-Gaonac'h
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Patent number: 11296145Abstract: Various fabrication method are disclosed. In one such method, at least one structure is formed on a substrate which protrudes outwardly from a plane of the substrate. A beam is used to form a layer of material, at least part of which is in direct contact with a semiconductor structure on the substrate, the semiconductor structure comprising at least one nanowire. The beam has a non-zero angle of incidence relative to the normal of the plane of the substrate such that the beam is incident on one side of the protruding structure, thereby preventing a portion of the nanowire in a shadow region adjacent the other side of the protruding structure in the plane of the substrate from being covered with the material.Type: GrantFiled: October 26, 2018Date of Patent: April 5, 2022Assignee: Microsoft Technology Licensing, LLCInventors: Kevin Van Hoogdalem, Leonardus Kouwenhoven, Pavel Aseev, Peter Krogstrup Jeppesen
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Publication number: 20220102425Abstract: Various fabrication methods are disclosed. In one such method, at least one structure is formed on a substrate which protrudes outwardly from a plane of the substrate. A beam is used to form a layer of material, at least part of which is in direct contact with a semiconductor structure on the substrate, the semiconductor structure comprising at least one nanowire. The beam has a non-zero angle of incidence relative to the normal of the plane of the substrate such that the beam is incident on one side of the protruding structure, thereby preventing a portion of the nanowire in a shadow region adjacent the other side of the protruding structure in the plane of the substrate from being covered with the material.Type: ApplicationFiled: July 21, 2021Publication date: March 31, 2022Applicant: Microsoft Technology Licensing, LLCInventors: Kevin Van Hoogdalem, Leonardus Kouwenhoven, Pavel Aseev, Peter Krogstrup Jeppesen
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Publication number: 20210296560Abstract: There is provided a method of selectively patterning a device structure. A hollow shadow wall is formed on a substrate. The hollow shadow wall is formed of a base lying on a surface of the substrate, and one or more side walls connected to the base. The one or more side walls extend away from the surface of the substrate and around the base to define an internal cavity of the hollow shadow wall. A device structure supported by the substrate adjacent to the shadow wall is selectively patterned by using a deposition beam to selectively deposit a layer of deposition material on the device structure. The deposition beam has a non-zero angle of incidence relative to a normal to the surface of the substrate and an orientation in the plane of the substrate's surface, such that the shadow wall prevents deposition on a surface portion of the device structure within a shadow region defined by the shadow wall.Type: ApplicationFiled: May 27, 2021Publication date: September 23, 2021Applicant: Microsoft Technology Licensing, LLCInventors: Senja Ramakers, Pavel Aseev, Amrita Singh, Jie Shen, Leonardus P. Kouwenhoven
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Patent number: 11024792Abstract: There is provided a method of selectively patterning a device structure. A hollow shadow wall is formed on a substrate. The hollow shadow wall is formed of a base lying on a surface of the substrate, and one or more side walls connected to the base. The one or more side walls extend away from the surface of the substrate and around the base to define an internal cavity of the hollow shadow wall. A device structure supported by the substrate adjacent to the shadow wall is selectively patterned by using a deposition beam to selectively deposit a layer of deposition material on the device structure. The deposition beam has a non-zero angle of incidence relative to a normal to the surface of the substrate and an orientation in the plane of the substrate's surface, such that the shadow wall prevents deposition on a surface portion of the device structure within a shadow region defined by the shadow wall.Type: GrantFiled: January 25, 2019Date of Patent: June 1, 2021Assignee: Microsoft Technology Licensing, LLCInventors: Senja Ramakers, Pavel Aseev, Amrita Singh, Jie Shen, Leonardus P. Kouwenhoven
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Publication number: 20200411744Abstract: In a masking phase, a first segment of an amorphous mask is formed on an underlying layer of a substrate. The first segment comprises a first set of trenches exposing the underlying layer. In the masking phase, a second segment of the amorphous mask is formed on the underlying layer. The second segment comprises a second set of trenches exposing the underlying layer. The segments are non-overlapping. An open end of one of the first set of trenches faces an open end of one of the second set of trenches, but the ends are separated by a portion of the amorphous mask. In a semiconductor growth phase, semiconductor material is grown, by selective area growth, in the first and second sets of trenches to form first and second sub-networks of nanowires on the underlying layer. The first and second sub-networks of nanowires are joined to form a single nanowire network.Type: ApplicationFiled: September 11, 2020Publication date: December 31, 2020Applicant: Microsoft Technology Licensing, LLCInventors: Pavel Aseev, Philippe Caroff-Gaonac'h
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Patent number: 10777728Abstract: In a masking phase, a first segment of an amorphous mask is formed on an underlying layer of a substrate. The first segment comprises a first set of trenches exposing the underlying layer. In the masking phase, a second segment of the amorphous mask is formed on the underlying layer. The second segment comprises a second set of trenches exposing the underlying layer. The segments are non-overlapping. An open end of one of the first set of trenches faces an open end of one of the second set of trenches, but the ends are separated by a portion of the amorphous mask. In a semiconductor growth phase, semiconductor material is grown, by selective area growth, in the first and second sets of trenches to form first and second sub-networks of nanowires on the underlying layer. The first and second sub-networks of nanowires are joined to form a single nanowire network.Type: GrantFiled: January 18, 2019Date of Patent: September 15, 2020Assignee: Microsoft Technology Licensing, LLCInventors: Pavel Aseev, Philippe Caroff-Gaonac'h
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Publication number: 20200243742Abstract: There is provided a method of selectively patterning a device structure. A hollow shadow wall is formed on a substrate. The hollow shadow wall is formed of a base lying on a surface of the substrate, and one or more side walls connected to the base. The one or more side walls extend away from the surface of the substrate and around the base to define an internal cavity of the hollow shadow wall. A device structure supported by the substrate adjacent to the shadow wall is selectively patterned by using a deposition beam to selectively deposit a layer of deposition material on the device structure. The deposition beam has a non-zero angle of incidence relative to a normal to the surface of the substrate and an orientation in the plane of the substrate's surface, such that the shadow wall prevents deposition on a surface portion of the device structure within a shadow region defined by the shadow wall.Type: ApplicationFiled: January 25, 2019Publication date: July 30, 2020Applicant: Microsoft Technology Licensing, LLCInventors: Senja Ramakers, Pavel Aseev, Amrita Singh, Jie Shen, Leonardus P. Kouwenhoven
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Publication number: 20200235276Abstract: In a masking phase, a first segment of an amorphous mask is formed on an underlying layer of a substrate. The first segment comprises a first set of trenches exposing the underlying layer. In the masking phase, a second segment of the amorphous mask is formed on the underlying layer. The second segment comprises a second set of trenches exposing the underlying layer. The segments are non-overlapping. An open end of one of the first set of trenches faces an open end of one of the second set of trenches, but the ends are separated by a portion of the amorphous mask. In a semiconductor growth phase, semiconductor material is grown, by selective area growth, in the first and second sets of trenches to form first and second sub-networks of nanowires on the underlying layer. The first and second sub-networks of nanowires are joined to form a single nanowire network.Type: ApplicationFiled: January 18, 2019Publication date: July 23, 2020Applicant: Microsoft Technology Licensing, LLCInventors: Pavel Aseev, Philippe Caroff-Gaonac'h
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Publication number: 20200027919Abstract: Various fabrication method are disclosed. In one such method, at least one structure is formed on a substrate which protrudes outwardly from a plane of the substrate. A beam is used to form a layer of material, at least part of which is in direct contact with a semiconductor structure on the substrate, the semiconductor structure comprising at least one nanowire. The beam has a non-zero angle of incidence relative to the normal of the plane of the substrate such that the beam is incident on one side of the protruding structure, thereby preventing a portion of the nanowire in a shadow region adjacent the other side of the protruding structure in the plane of the substrate from being covered with the material.Type: ApplicationFiled: October 26, 2018Publication date: January 23, 2020Applicant: Microsoft Technology Licensing, LLCInventors: Kevin Van Hoogdalem, Leonardus Kouwenhoven, Pavel Aseev, Peter Krogstrup Jeppesen