Abstract: The present invention relates to the field of computer science and can be used for neural network emulation and digital signal processing. Increasing of the neural processor performance is achieved using the ability to change word lengths of results in program mode. The neural processor includes six registers, a shift register, a AND gate, two FIFOs, a switch, a multiplexer, two saturation units, a calculation unit and a adder circuit to execute operations over vectors of programmable word length data. Increasing of the saturation unit performance is achieved using the ability to process vector of input operands with programmable word length at a time. Increasing of the adder circuit performance is achieved using ability to sum two vectors of input operands of programmable word lengths.