Abstract: Provided is a solid-state imaging element provided with a comparator for each column, the solid-state imaging element improving the image quality of image data. The solid-state imaging element includes a first comparison element and a transistor. An input voltage related to the voltage of a vertical signal line is input to a source of the first comparison element, and the first comparison element outputs a drain voltage corresponding to the gate-source voltage from a drain. A signal corresponding to the voltage of the vertical signal line is input to a gate of the transistor, and a source of the transistor is connected to the drain of the first comparison element.

Abstract: The present disclosure relates to a solid-state image sensing apparatus, a control method, and an electronic device capable of reducing a settling time of a vertical signal line at the time of a read operation of pixels. A column processing unit A/D converts pixel signals of a plurality of pixels. A vertical signal line feeds the pixel signals output from the pixels to the A/D converter. A pull-up circuit increases a potential of the vertical signal line at the time of starting a read operation of the pixels. For example, the present disclosure can be applied to a CMOS (Complementary Metal-Oxide Semiconductor) image sensor that performs an interleaving operation or the like.

Abstract: The present disclosure relates to a solid-state image sensing apparatus, a control method, and an electronic device capable of reducing a settling time of a vertical signal line at the time of a read operation of pixels. A column processing unit A/D converts pixel signals of a plurality of pixels. A vertical signal line feeds the pixel signals output from the pixels to the A/D converter. A pull-up circuit increases a potential of the vertical signal line at the time of starting a read operation of the pixels. For example, the present disclosure can be applied to a CMOS (Complementary Metal-Oxide Semiconductor) image sensor that performs an interleaving operation or the like.

Abstract: The present invention discloses a receiver for coherent optical transport systems based on analog signal processing and the method of recovering transmitted data by processing signals in electronic domain. In the present invention, high-speed electrical signals obtained from optical-to-electrical converters which carry transmitted data information in a coherent transport system are jointly processed in analog domain itself without converting these signals to the digital domain using high speed ADCs. Different processing steps which may include carrier phase & frequency offset recovery and compensation, polarization mode dispersion and/or chromatic dispersion, clock & data recovery and deserialization may be performed while keeping the information signals in analog domain itself.

Abstract: The present disclosure relates to a solid-state image sensing apparatus, a control method, and an electronic device capable of reducing a settling time of a vertical signal line at the time of a read operation of pixels. A column processing unit A/D converts pixel signals of a plurality of pixels. A vertical signal line feeds the pixel signals output from the pixels to the A/D converter. A pull-up circuit increases a potential of the vertical signal line at the time of starting a read operation of the pixels. For example, the present disclosure can be applied to a CMOS (Complementary Metal-Oxide Semiconductor) image sensor that performs an interleaving operation or the like.

Abstract: The present disclosure relates to a solid-state image sensing apparatus, a control method, and an electronic device capable of reducing a settling time of a vertical signal line at the time of a read operation of pixels. A column processing unit A/D converts pixel signals of a plurality of pixels. A vertical signal line feeds the pixel signals output from the pixels to the A/D converter. A pull-up circuit increases a potential of the vertical signal line at the time of starting a read operation of the pixels. For example, the present disclosure can be applied to a CMOS (Complementary Metal-Oxide Semiconductor) image sensor that performs an interleaving operation or the like.

Abstract: The present disclosure relates to a solid-state image sensing apparatus, a control method, and an electronic device capable of reducing a settling time of a vertical signal line at the time of a read operation of pixels. A column processing unit A/D converts pixel signals of a plurality of pixels. A vertical signal line feeds the pixel signals output from the pixels to the A/D converter. A pull-up circuit increases a potential of the vertical signal line at the time of starting a read operation of the pixels. For example, the present disclosure can be applied to a CMOS (Complementary Metal-Oxide Semiconductor) image sensor that performs an interleaving operation or the like.

Abstract: The present disclosure relates to a solid-state image sensing apparatus, a control method, and an electronic device capable of reducing a settling time of a vertical signal line at the time of a read operation of pixels. A column processing unit A/D converts pixel signals of a plurality of pixels. A vertical signal line feeds the pixel signals output from the pixels to the A/D converter. A pull-up circuit increases a potential of the vertical signal line at the time of starting a read operation of the pixels. For example, the present disclosure can be applied to a CMOS (Complementary Metal-Oxide Semiconductor) image sensor that performs an interleaving operation or the like.

Abstract: The present invention discloses a receiver for coherent optical transport systems based on analog signal processing and the method of recovering transmitted data by processing signals in electronic domain. In the present invention, high-speed electrical signals obtained from optical-to-electrical converters which carry transmitted data information in a coherent transport system are jointly processed in analog domain itself without converting these signals to the digital domain using high speed ADCs. Different processing steps which may include carrier phase & frequency offset recovery and compensation, polarization mode dispersion and/or chromatic dispersion, clock & data recovery and deserialization may be performed while keeping the information signals in analog domain itself.