Patents by Inventor Pawel FIEDOROW

Pawel FIEDOROW has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11632091
    Abstract: A differential pair for an input stage includes two identical branches in parallel, each branch including a first MOS transistor and a second MOS transistor arranged in series, wherein the first transistor and the second transistor have a channel of the same type, and wherein each of the first transistor and the second transistor has a gate coupled to the same corresponding input of the differential pair and a circuit configured to apply to each of the first transistors a potential difference between a source and a channel-forming region of the first transistor.
    Type: Grant
    Filed: August 12, 2021
    Date of Patent: April 18, 2023
    Assignee: STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventors: Philippe Pignolo, Pawel Fiedorow, Vincent Rabary
  • Publication number: 20220077831
    Abstract: In an embodiment a differential pair for an input stage includes two identical branches in parallel, each branch including a first MOS transistor and a second MOS transistor arranged in series, wherein the first transistor and the second transistor have a channel of the same type, and wherein each of the first transistor and the second transistor has a gate coupled to the same corresponding input of the differential pair and a circuit configured to apply to each of the first transistors a potential difference between a source and a channel-forming region of the first transistor.
    Type: Application
    Filed: August 12, 2021
    Publication date: March 10, 2022
    Inventors: Philippe Pignolo, Pawel Fiedorow, Vincent Rabary
  • Patent number: 10715145
    Abstract: An analog multiplexer includes inputs and one output. A switching circuit is coupled between each input and the output. Each switching circuit includes an NMOS switching module, having an on state and an off state, and a control module supplied by a first supply voltage and operating to reduce leakage currents of the NMOS switching module when in the off state. The control module further operates to make the first NMOS switching module bidirectional irrespective of voltages present at the input and at the output.
    Type: Grant
    Filed: July 9, 2019
    Date of Patent: July 14, 2020
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventors: Thierry Masson, Pawel Fiedorow
  • Publication number: 20190334525
    Abstract: An analog multiplexer includes inputs and one output. A switching circuit is coupled between each input and the output. Each switching circuit includes an NMOS switching module, having an on state and an off state, and a control module supplied by a first supply voltage and operating to reduce leakage currents of the NMOS switching module when in the off state. The control module further operates to make the first NMOS switching module bidirectional irrespective of voltages present at the input and at the output.
    Type: Application
    Filed: July 9, 2019
    Publication date: October 31, 2019
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventors: Thierry MASSON, Pawel FIEDOROW
  • Patent number: 10396792
    Abstract: An analog multiplexer includes inputs and one output. A switching circuit is coupled between each input and the output. Each switching circuit includes an NMOS switching module, having an on state and an off state, and a control module supplied by a first supply voltage and operating to reduce leakage currents of the NMOS switching module when in the off state. The control module further operates to make the first NMOS switching module bidirectional irrespective of voltages present at the input and at the output.
    Type: Grant
    Filed: April 18, 2018
    Date of Patent: August 27, 2019
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventors: Thierry Masson, Pawel Fiedorow
  • Publication number: 20180241395
    Abstract: An analog multiplexer includes inputs and one output. A switching circuit is coupled between each input and the output. Each switching circuit includes an NMOS switching module, having an on state and an off state, and a control module supplied by a first supply voltage and operating to reduce leakage currents of the NMOS switching module when in the off state. The control module further operates to make the first NMOS switching module bidirectional irrespective of voltages present at the input and at the output.
    Type: Application
    Filed: April 18, 2018
    Publication date: August 23, 2018
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventors: Thierry Masson, Pawel Fiedorow
  • Patent number: 9979396
    Abstract: An analog multiplexer includes inputs and one output. A switching circuit is coupled between each input and the output. Each switching circuit includes an NMOS switching module, having an on state and an off state, and a control module supplied by a first supply voltage and operating to reduce leakage currents of the NMOS switching module when in the off state. The control module further operates to make the first NMOS switching module bidirectional irrespective of voltages present at the input and at the output.
    Type: Grant
    Filed: August 17, 2017
    Date of Patent: May 22, 2018
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventors: Thierry Masson, Pawel Fiedorow
  • Patent number: 9520869
    Abstract: A switching circuit a multiplexer includes an NMOS switch module and a PMOS switch module connected in parallel between an input and an output. A first control module powered from a first power supply voltage operates to reduce leakage currents of the NMOS switching module when in the non-conducting state. A second control module powered from a second power supply voltage operates to reduce leakage currents of the PMOS switching module when in the non-conducting state. A voltage selection circuit is configured to deliver a voltage as the second power supply voltage equal to the greater of the first power supply voltage and the voltages present at the input and at the output.
    Type: Grant
    Filed: August 27, 2015
    Date of Patent: December 13, 2016
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventors: Pawel Fiedorow, Thierry Masson
  • Patent number: 9490761
    Abstract: An amplifier includes a pair of transistors connected in a differential stage, and a bias current source connected to a common node of the differential stage. A slew-rate compensation circuit is configured to derive from the common node a dynamic compensation current during a phase in which the voltage of the common node varies.
    Type: Grant
    Filed: January 13, 2015
    Date of Patent: November 8, 2016
    Assignee: STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventors: Philippe Maige, Pawel Fiedorow
  • Publication number: 20160173079
    Abstract: A switching circuit a multiplexer includes an NMOS switch module and a PMOS switch module connected in parallel between an input and an output. A first control module powered from a first power supply voltage operates to reduce leakage currents of the NMOS switching module when in the non-conducting state. A second control module powered from a second power supply voltage operates to reduce leakage currents of the PMOS switching module when in the non-conducting state. A voltage selection circuit is configured to deliver a voltage as the second power supply voltage equal to the greater of the first power supply voltage and the voltages present at the input and at the output.
    Type: Application
    Filed: August 27, 2015
    Publication date: June 16, 2016
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventors: Pawel Fiedorow, Thierry Masson
  • Publication number: 20150200634
    Abstract: An amplifier includes a pair of transistors connected in a differential stage, and a bias current source connected to a common node of the differential stage. A slew-rate compensation circuit is configured to derive from the common node a dynamic compensation current during a phase in which the voltage of the common node varies.
    Type: Application
    Filed: January 13, 2015
    Publication date: July 16, 2015
    Inventors: Philippe MAIGE, Pawel FIEDOROW