Abstract: Reliable hybrid bonded apparatuses are provided. An example process cleans nanoparticles from at least the smooth oxide top layer of a surface to be hybrid bonded after the surface has already been activated for the hybrid bonding. Conventionally, such an operation is discouraged. However, the example cleaning processes described herein increase the electrical reliability of microelectronic devices. Extraneous metal nanoparticles can enable undesirable current and signal leakage from finely spaced traces, especially at higher voltages with ultra-fine trace pitches. In the example process, the extraneous nanoparticles may be both physically removed and/or dissolved without detriment to the activated bonding surface.

Abstract: A method of manufacturing a device package. The method comprises patterning a first substrate to form patterned regions comprising a thermal oxide layer. The method further comprises directly bonding the patterned regions of the first substrate to a second substrate to form a bonding interface. The bonded first and second substrates form an integrated cooling assembly comprising a coolant chamber volume. Portions of the first substrate exposed to the coolant chamber volume comprise a native oxide layer.

Abstract: Reliable hybrid bonded apparatuses are provided. An example process cleans nanoparticles from at least the smooth oxide top layer of a surface to be hybrid bonded after the surface has already been activated for the hybrid bonding. Conventionally, such an operation is discouraged. However, the example cleaning processes described herein increase the electrical reliability of microelectronic devices. Extraneous metal nanoparticles can enable undesirable current and signal leakage from finely spaced traces, especially at higher voltages with ultra-fine trace pitches. In the example process, the extraneous nanoparticles may be both physically removed and/or dissolved without detriment to the activated bonding surface.

Abstract: A method of manufacturing a device package. The method comprises patterning a first substrate to form patterned regions comprising a thermal oxide layer. The method further comprises directly bonding the patterned regions of the first substrate to a second substrate to form a bonding interface. The bonded first and second substrates form an integrated cooling assembly comprising a coolant chamber volume. Portions of the first substrate exposed to the coolant chamber volume comprise a native oxide layer.

Abstract: Disclosed herein are methods of forming a microelectronic device. In some embodiments, the methods include preparing a first surface of a first substrate for direct bonding and thinning the first substrate to form a thinned substrate, where the thinned substrate comprises the first surface and a second surface and where the first and second surfaces are on opposing sides of the thinned substrate. The method further includes, after thinning, depositing a stress balancing layer onto the second surface, singulating the thinned substrate to form a plurality of dies, and direct bonding at least one of the plurality of dies to a second substrate.

Abstract: An element, a bonded structure that includes the element, and methods of forming the same are disclosed. The element can include a nonconductive field region having a surface defining at least a portion of a bonding surface of the element. The surface of the nonconductive field region is prepared for direct bonding. The element can also include a conductive feature having an upper surface that defines at least a portion of the bonding surface of the element, a lower surface opposite the upper surface, and a sidewall that extends between the upper surface and the lower surface. An angle between the upper surface and the sidewall is about 75° or less. The bonded structure includes the element and a second element directly bonded to one another without an intervening adhesive.

Abstract: A method of forming direct metal bonds between a first device and a second device is provided. The method may include heating a workpiece to a temperature between 40 C and 150 C, and directing sonic energy towards the heated workpiece. Here, the workpiece may include the first device and the second device directly bonded to the first device through a dielectric material interface.

Abstract: A method includes moving at least one of a first element and a second element to contact first regions of the first and second elements with one another while second regions of the first and second elements are not in contact with one another. The first regions directly bond to one another to form a bond interface without adhesive. The method further includes directly bonding the second regions of the first and second elements to one another without adhesive by controllably releasing one of the first element and the second element such that the bond interface and a boundary between the bond interface and the second regions not in contact with one another expands radially away from the first regions. The second regions have first vibrations within a bond initiation region bordering the boundary. The method further includes externally applying second vibrations to at least one of the first and second elements during the directly bonding.

Abstract: Reliable hybrid bonded apparatuses are provided. An example process cleans nanoparticles from at least the smooth oxide top layer of a surface to be hybrid bonded after the surface has already been activated for the hybrid bonding. Conventionally, such an operation is discouraged. However, the example cleaning processes described herein increase the electrical reliability of microelectronic devices. Extraneous metal nanoparticles can enable undesirable current and signal leakage from finely spaced traces, especially at higher voltages with ultra-fine trace pitches. In the example process, the extraneous nanoparticles may be both physically removed and/or dissolved without detriment to the activated bonding surface.

Abstract: An element and a bonded structure including the element are disclosed. The element can include a non-conductive region having a cavity extending at least partially through a thickness of the non-conductive region from the contact surface, and a contact feature formed in the cavity. The non-conductive region is configured to directly bond to a non-conductive region of a second element. The contact pad of the element is configured to directly bond to a contact pad of the second element. The contact pad can include a first conductive material and a second conductive material. The first conductive material can have a unit cell size greater than a unit cell size of the second conductive material. The first conductive material can be a metal alloying material. The first conductive material can be a metal silicide and the second conductive material can be a metal.

Abstract: Reliable hybrid bonded apparatuses are provided. An example process cleans nanoparticles from at least the smooth oxide top layer of a surface to be hybrid bonded after the surface has already been activated for the hybrid bonding. Conventionally, such an operation is discouraged. However, the example cleaning processes described herein increase the electrical reliability of microelectronic devices. Extraneous metal nanoparticles can enable undesirable current and signal leakage from finely spaced traces, especially at higher voltages with ultra-fine trace pitches. In the example process, the extraneous nanoparticles may be both physically removed and/or dissolved without detriment to the activated bonding surface.

Abstract: Structures and methods for direct bonding are disclosed. A bonded structure can include a first element and a second element. The first element can include a first non-conductive structure that has a non-conductive bonding surface, a cavity that extends at least partially through a thickness of the non-conductive structure from the non-conductive bonding surface, and a first conductive feature that has a first conductive material and a second conductive material over the first conductive material disposed in the cavity. A maximum grain size, in a linear lateral dimension, of the second conductive material can be smaller than 20% of the linear lateral dimension of the conductive feature. There can be less than 20 parts per million (ppm) of impurities at grain boundaries of the second conductive material.

Abstract: Reliable hybrid bonded apparatuses are provided. An example process cleans nanoparticles from at least the smooth oxide top layer of a surface to be hybrid bonded after the surface has already been activated for the hybrid bonding. Conventionally, such an operation is discouraged. However, the example cleaning processes described herein increase the electrical reliability of microelectronic devices. Extraneous metal nanoparticles can enable undesirable current and signal leakage from finely spaced traces, especially at higher voltages with ultra-fine trace pitches. In the example process, the extraneous nanoparticles may be both physically removed and/or dissolved without detriment to the activated bonding surface.

Abstract: A method to improve CdTe-based photovoltaic device efficiency is disclosed, the method including steps for removing surface contaminants from a semiconductor absorber layer prior to the deposition or formation of a back contact layer on the semiconductor absorber layer, the surface contaminants removed using at least one of a dry etching process and a wet etching process.

Abstract: A method and apparatus for an amount of Cu or Sb dopant incorporated into a zinc-based layer as the layer is being formed. The layer is formed over a coated substrate using an electrochemical deposition (ECD) process. In the ECD process, the bias voltage and plating solution composition may be systematically changed during the electrochemical deposition process to change the amount of Cu or Sb dopant incorporated into the plated layer.

Abstract: A method and apparatus for an amount of Cu or Sb dopant incorporated into a zinc-based layer as the layer is being formed. The layer is formed over a coated substrate using an electrochemical deposition (ECD) process. In the ECD process, the bias voltage and plating solution composition may be systematically changed during the electrochemical deposition process to change the amount of Cu or Sb dopant incorporated into the plated layer.

Abstract: A method and apparatus for an amount of Cu or Sb dopant incorporated into a zinc-based layer as the layer is being formed. The layer is formed over a coated substrate using an electrochemical deposition (ECD) process. In the ECD process, the bias voltage and plating solution composition may be systematically changed during the electrochemical deposition process to change the amount of Cu or Sb dopant incorporated into the plated layer.

Abstract: A method to improve CdTe-based photovoltaic device efficiency is disclosed, the method including steps for removing surface contaminants from a semiconductor absorber layer prior to the deposition or formation of a back contact layer on the semiconductor absorber layer, the surface contaminants removed using at least one of a dry etching process and a wet etching process.