Abstract: At least one method, apparatus and system for providing capturing synchrotron radiation for a metrology tool, are disclosed. A beam using a first light emitting device is provided. The first light emitting device comprises a first electron path bend. A first synchrotron radiation is provided from the first electron path bend to a first metrology tool configured to perform a metrology inspection using the first synchrotron radiation.

Abstract: At least one method, apparatus and system for providing capturing synchrotron radiation for a metrology tool, are disclosed. A beam using a first light emitting device is provided. The first light emitting device comprises a first electron path bend. A first synchrotron radiation is provided from the first electron path bend to a first metrology tool configured to perform a metrology inspection using the first synchrotron radiation.

Abstract: A lithography mask structure is provided, including: a substrate; at least one reflective layer over the substrate; and an absorber film stack over the at least one reflective layer, the absorber film stack including a plurality of first film layers of a first material and at least one second film layer of a second material. The second material is different from the first material, and the second film layer(s) is interleaved with the plurality of first film layers. In one embodiment, the total thickness of the absorber film stack is less than 50 nm. In another embodiment, the reflectivity of the absorber film stack is less than 2% for a pre-defined wavelength of EUV light. In a further embodiment, the second film layer(s) prevents the average crystallite size of the first film layers from exceeding the thickness of the first film layers.

Abstract: A lithography mask structure is provided, including: a substrate; at least one reflective layer over the substrate; and an absorber film stack over the at least one reflective layer, the absorber film stack including a plurality of first film layers of a first material and at least one second film layer of a second material. The second material is different from the first material, and the second film layer(s) is interleaved with the plurality of first film layers. In one embodiment, the total thickness of the absorber film stack is less than 50 nm. In another embodiment, the reflectivity of the absorber film stack is less than 2% for a pre-defined wavelength of EUV light. In a further embodiment, the second film layer(s) prevents the average crystallite size of the first film layers from exceeding the thickness of the first film layers.

Abstract: A method and an apparatus are for manipulating an image displayed on a display of an electronic device (100). Functions that are used include panning the image in a direction that is determined in response to a detection of a first stroke (125, 410, 610) of a touch and pressure sensitive input modality (105) which is performed using an amount of touch pressure that meets a first pressure criterion, while the electronic device is in a pan mode; changing between the pan mode and a zoom mode in response to a touch pressure of the input modality that meets a second pressure criterion; and zooming the image in response to a second stroke (130, 415, 615) of the input modality, wherein the stroke is performed using an amount of touch pressure that meets a third pressure criterion, while the electronic device is in the zoom mode.

Abstract: An EUV mask (10) includes an opening (26) that helps to attenuate and phase shift extreme ultraviolet radiation using a subtractive rather than additive method. An etch stop layer (20) may be provided between a lower multilayer reflective stack (14) and an upper multilayer reflective stack (22) to ensure an appropriate and accurate depth of the opening. An absorber layer (32) may be deposited within the opening to sufficiently reduce the amount of reflection within dark region (30). Optimal thicknesses and locations of the various layers are described.

Abstract: A semiconductor device is formed by patterning a resist layer using a rim phase shifting mask. A multilayer or single patterning layer to form the different phase-shifting regions and opaque regions is used to manufacture the rim phase shifting mask. First phase shifting regions are formed by transferring an opening in the multilayer or single patterning layer through an opaque layer and a transparent substrate. At least portions of the same multilayer or single patterning layer are used to recess the opaque layer a predetermined distance to form rims (second phase shifting regions). The first phase-shifting regions phase shift the light traveling through them 180 degrees relative to the light traveling through the rims, thereby increasing the contrast of the light traveling through the rim phase shifting mask.

Abstract: An EUV mask (10) includes an opening (26) that helps to attenuate and phase shift extreme ultraviolet radiation using a subtractive rather than additive method. An etch stop layer (20) may be provided between a lower multilayer reflective stack (14) and an upper multilayer reflective stack (22) to ensure an appropriate and accurate depth of the opening. An absorber layer (32) may be deposited within the opening to sufficiently reduce the amount of reflection within dark region (30). Optimal thicknesses and locations of the various layers are described.

Abstract: A semiconductor device is formed by patterning a resist layer using a rim phase shifting mask. A multilayer or single patterning layer to form the different phase-shifting regions and opaque regions is used to manufacture the rim phase shifting mask. First phase shifting regions are formed by transferring an opening in the multilayer or single patterning layer through an opaque layer and a transparent substrate. At least portions of the same multilayer or single patterning layer are used to recess the opaque layer a predetermined distance to form rims (second phase shifting regions). The first phase-shifting regions phase shift the light traveling through them 180 degrees relative to the light traveling through the rims, thereby increasing the contrast of the light traveling through the rim phase shifting mask.

Abstract: A process for creating a mask substrate involving depositing: 1) a coating on one or both sides of a low thermal expansion material EUVL mask substrate to improve defect inspection, surface finishing, and defect levels; and 2) a high dielectric coating, on the backside to facilitate electrostatic chucking and to correct for any bowing caused by the stress imbalance imparted by either other deposited coatings or the multilayer coating of the mask substrate. An film, such as TaSi, may be deposited on the front side and/or back of the low thermal expansion material before the material coating to balance the stress. The low thermal expansion material with a silicon overlayer and a silicon and/or other conductive underlayer enables improved defect inspection and stress balancing.

Abstract: A passivating layer (220) is formed overlying portions of a mask (200). The mask (200) is used to pattern a semiconductor device substrate (62). In accordance with one embodiment of the present invention, the passivating layer (220) is removed prior to patterning the semiconductor device substrate (62). In yet another embodiment, the passivating layer (220) is cleaned prior to patterning the semiconductor device substrate (62) and then left to remain overlying portions of the mask (200) during the patterning process.

Abstract: A method for patterning a semiconductor device using a lithographic mask (300) having a membrane layer (204) overlying an opening in a substrate. The membrane layer supports a scattering layer (208), and has a varying content of silicon through a thickness thereof, that is, along the direction that is normal to the substrate. In one embodiment, the content of silicon increases along the normal direction, outward from the substrate. The mask has improved durability and reduces occurrences of pinhole defects in the membrane layer.

Abstract: A method of forming a lithographic mask that comprises the steps of obtaining a first substrate having a first base and a first layer over the first base. The first layer is patterned, as is at least a portion of the entire thickness of the first base to form a first pattern. A second substrate having a second base is obtained and a second layer is formed over the second base. A third layer is formed over the second layer. The third layer is patterned to form an attenuating pattern corresponding to a semiconductor device feature pattern and the first and second substrates are bonded after patterning the first layer. The second base is etched to remove the entire thickness of the second base corresponding to the first pattern. The steps need not be sequential in the above method.