Patents by Inventor Paylos Michael Vranas

Paylos Michael Vranas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Data capture technique for high speed signaling
    Patent number: 7418068
    Abstract: A data capture technique for high speed signaling to allow for optimal sampling of an asynchronous data stream. This technique allows for extremely high data rates and does not require that a clock be sent with the data as is done in source synchronous systems. The present invention also provides a hardware mechanism for automatically adjusting transmission delays for optimal two-bit simultaneous bi-directional (SiBiDi) signaling.
    Type: Grant
    Filed: February 25, 2002
    Date of Patent: August 26, 2008
    Assignee: International Business Machines Corporation
    Inventors: Wayne Melvin Barrett, Dong Chen, Paul William Coteus, Alan Gene Gara, Rory Jackson, Gerard Vincent Kopcsay, Ben Jesse Nathanson, Paylos Michael Vranas, Todd E. Takken
  • Data capture technique for high speed signaling
    Publication number: 20040114698
    Abstract: A data capture technique for high speed signaling to allow for optimal sampling of an asynchronous data stream. This technique allows for extremely high data rates and does not require that a clock be sent with the data as is done in source synchronous systems. The present invention also provides a hardware mechanism for automatically adjusting transmission delays for optimal two-bit simultaneous bi-directional (SiBiDi) signaling.
    Type: Application
    Filed: February 5, 2004
    Publication date: June 17, 2004
    Inventors: Wayne Melvin Barrett, Dong Chen, Paul William Coteus, Alan Gene Gara, Rory Jackson, Gerard Vincent Kopcsay, Ben Jesse Nathanson, Paylos Michael Vranas