Patents by Inventor Pedram Khalili Amiri

Pedram Khalili Amiri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240105245
    Abstract: Embodiments of a Stochastic memristive array (SMA) device based on arrays of voltage-controlled magnetic tunnel junctions (MTJs) are disclosed. The SMA device is based on an array of stochastic (low energy barrier) magnetic tunnel junctions that are connected in parallel which simultaneously exhibits features that include (i) stochasticity and (ii) memristive behavior. The energy barrier of the MJTs may be tuned by an applied voltage (electric field). SMA devices may find applications in emerging computing concepts such as probabilistic computing and memcomputing, among others, providing a pathway towards intelligent hybrid CMOS-spintronic systems.
    Type: Application
    Filed: December 6, 2023
    Publication date: March 28, 2024
    Inventors: Pedram Khalili Amiri, Giovanni Finocchio
  • Patent number: 11930719
    Abstract: Magnetic memory devices are provided. The devices comprise a first ferromagnetic layer, a second ferromagnetic layer, and a tunnel barrier layer composed of a doped semiconductor (instead of an insulator or a dielectric) between the first and second ferromagnetic layers and forming at least one ferromagnetic-doped semiconductor interface.
    Type: Grant
    Filed: January 31, 2020
    Date of Patent: March 12, 2024
    Assignee: Northwestern University
    Inventors: Pedram Khalili Amiri, Manijeh Razeghi
  • Patent number: 11875833
    Abstract: Embodiments of a Stochastic memristive array (SMA) device based on arrays of voltage-controlled magnetic tunnel junctions (MTJs) are disclosed. The SMA device is based on an array of stochastic (low energy barrier) magnetic tunnel junctions that are connected in parallel which simultaneously exhibits features that include (i) stochasticity and (ii) memristive behavior. The energy barrier of the MJTs may be tuned by an applied voltage (electric field). SMA devices may find applications in emerging computing concepts such as probabilistic computing and memcomputing, among others, providing a pathway towards intelligent hybrid CMOS-spintronic systems.
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: January 16, 2024
    Assignee: NORTHWESTERN UNIVERSITY
    Inventors: Pedram Khalili Amiri, Giovanni Finocchio
  • Publication number: 20230395112
    Abstract: According to certain aspects of the present disclosure, a device is provided. The device includes a thin film of cobalt. A platinum layer is disposed on the thin film of cobalt. An aluminum layer is disposed on the platinum layer. The aluminum layer disposed on the platinum layer encapsulates the thin film of cobalt. A plurality of electrical contacts is in electrical communication with the thin film of cobalt. Two electrical contacts of the plurality of electrical contacts are configured to receive a write-current therebetween. Four electrical contacts of the plurality of contacts are configured for reading a 4-point resistance.
    Type: Application
    Filed: June 1, 2023
    Publication date: December 7, 2023
    Inventors: Matthew A. Grayson, Pedram Khalili-Amiri, Chulin Wang, Claire Cecelia Onsager, Sevde Nur Arpaci, Victor Lopez Dominguez
  • Publication number: 20230210014
    Abstract: A voltage-controlled magnetic anisotropy (VCMA) magnetic tunnel junction (MTJ) device includes a bottom electrode, a bottom CoFeB fixed layer disposed above and in electrical communication with the bottom electrode, a MgO layer disposed above the bottom CoFeB fixed layer, a top CoFeB free layer disposed above the MgO layer, a Mo capping layer disposed above the top CoFeB free layer, and a top electrode disposed above and in electrical communication with the Mo capping layer. A magnetization state of the top CoFeB free layer is switchable between an original state and an opposite state by applying a switching voltage across the MTJ device for a switching duration corresponding to a half period of a magnetic moment precession of the top CoFeB free layer.
    Type: Application
    Filed: December 19, 2022
    Publication date: June 29, 2023
    Inventor: Pedram Khalili Amiri
  • Publication number: 20230210015
    Abstract: An antiferromagnetic (AFM) memory device includes a heavy metal (HM) layer having electrical terminals at two ends, and an AFM tunnel junction (ATJ) interfaced with the HM layer between the two ends. The ATJ includes an AFM material interfaced with a surface of the HM layer, a tunnel barrier layer including an oxide and interfaced with a top of the AFM layer, and a capping layer interfaced with a top of the tunnel barrier layer. The capping layer includes a heavy metal material or a ferromagnetic material. An electrode disposed on top of the capping layer facilitates reading information from the AFM memory device according to a magnetoresistance value measured between the electrode and one of the terminals of the HM layer. Information is written into the AFM memory device by passing current through the HM layer and below the AFM layer.
    Type: Application
    Filed: December 19, 2022
    Publication date: June 29, 2023
    Inventor: Pedram Khalili Amiri
  • Publication number: 20220309329
    Abstract: A stochastic computing artificial neural network (SC-ANN) includes magnetic tunnel junction (MTJ) devices configured as true random number generators (TRNGs) to output stochastic bit-streams of random numbers for processing by input, hidden, and/or output nodes of the ANN. The processing may include multiplication by a weighting value corresponding to a respective numerical value from the stochastic bit-streams.
    Type: Application
    Filed: March 24, 2022
    Publication date: September 29, 2022
    Inventor: Pedram Khalili Amiri
  • Patent number: 11367474
    Abstract: A new type of two-terminal magnetic memory device, referred to as antiferromagnetic voltage-controlled memory (AVM) device is disclosed. Antiferromagnetic (AFM) materials have zero magnetization, which makes it immune to external magnetic fields and opens to the possibility to implement high-density arrays without dipole coupling between adjacent devices. The AVM device combines a new state variable e.g., Néel vector l in a metallic (or non-metallic) AFM material with an electric-field-induced switching mechanism for writing of information. Utilizing electric fields E via an interfacial voltage-controlled magnetic anisotropy (VCMA) effect is a more efficient writing mechanism. The AVM device implements an antiferromagnetic tunnel junction (AFM-TJ) structure to exhibit high or low resistance states (HR, LR) corresponding to binary logic states of zero (0) or one (1). Both the AVM device structure and methods of writing a signal to the AVM device are disclosed.
    Type: Grant
    Filed: July 17, 2019
    Date of Patent: June 21, 2022
    Assignee: NORTHWESTERN UNIVERSITY
    Inventor: Pedram Khalili Amiri
  • Publication number: 20220109103
    Abstract: Magnetic memory devices are provided. The devices comprise a first ferromagnetic layer, a second ferromagnetic layer, and a tunnel barrier layer composed of a doped semiconductor (instead of an insulator or a dielectric) between the first and second ferromagnetic layers and forming at least one ferromagnetic-doped semiconductor interface.
    Type: Application
    Filed: January 31, 2020
    Publication date: April 7, 2022
    Inventors: Pedram Khalili Amiri, Manijeh Razeghi
  • Publication number: 20210383852
    Abstract: Embodiments of a Stochastic memristive array (SMA) device based on arrays of voltage-controlled magnetic tunnel junctions (MTJs) are disclosed. The SMA device is based on an array of stochastic (low energy barrier) magnetic tunnel junctions that are connected in parallel which simultaneously exhibits features that include (i) stochasticity and (ii) memristive behavior. The energy barrier of the MJTs may be tuned by an applied voltage (electric field). SMA devices may find applications in emerging computing concepts such as probabilistic computing and memcomputing, among others, providing a pathway towards intelligent hybrid CMOS-spintronic systems.
    Type: Application
    Filed: August 19, 2021
    Publication date: December 9, 2021
    Inventors: Pedram Khalili Amiri, Giovanni Finocchio
  • Publication number: 20210383850
    Abstract: A new type of two-terminal magnetic memory device, referred to as antiferromagnetic voltage-controlled memory (AVM) device is disclosed. Antiferromagnetic (AFM) materials have zero magnetization, which makes it immune to external magnetic fields and opens to the possibility to implement high-density arrays without dipole coupling between adjacent devices. The AVM device combines a new state variable e.g., Néel vector l in a metallic (or non-metallic) AFM material with an electric-field-induced switching mechanism for writing of information. Utilizing electric fields E via an interfacial voltage-controlled magnetic anisotropy (VCMA) effect is a more efficient writing mechanism. The AVM device implements an antiferromagnetic tunnel junction (AFM-TJ) structure to exhibit high or low resistance states (HR, LR) corresponding to binary logic states of zero (0) or one (1). Both the AVM device structure and methods of writing a signal to the AVM device are disclosed.
    Type: Application
    Filed: July 17, 2019
    Publication date: December 9, 2021
    Inventor: Pedram Khalili Amiri
  • Patent number: 11127446
    Abstract: Embodiments of a Stochastic memristive array (SMA) device based on arrays of voltage-controlled magnetic tunnel junctions (MTJs) are disclosed. The SMA device is based on an array of stochastic (low energy barrier) magnetic tunnel junctions that are connected in parallel which simultaneously exhibits features that include (i) stochasticity and (ii) memristive behavior. The energy barrier of the MJTs may be tuned by an applied voltage (electric field). SMA devices may find applications in emerging computing concepts such as probabilistic computing and memcomputing, among others, providing a pathway towards intelligent hybrid CMOS-spintronic systems.
    Type: Grant
    Filed: July 2, 2020
    Date of Patent: September 21, 2021
    Assignee: NORTHWESTERN UNIVERSITY
    Inventors: Pedram Khalili Amiri, Giovanni Finocchio
  • Publication number: 20210005236
    Abstract: Embodiments of a Stochastic memristive array (SMA) device based on arrays of voltage-controlled magnetic tunnel junctions (MTJs) are disclosed. The SMA device is based on an array of stochastic (low energy barrier) magnetic tunnel junctions that are connected in parallel which simultaneously exhibits features that include (i) stochasticity and (ii) memristive behavior. The energy barrier of the MJTs may be tuned by an applied voltage (electric field). SMA devices may find applications in emerging computing concepts such as probabilistic computing and memcomputing, among others, providing a pathway towards intelligent hybrid CMOS-spintronic systems.
    Type: Application
    Filed: July 2, 2020
    Publication date: January 7, 2021
    Inventors: Pedram Khalili Amiri, Giovanni Finocchio
  • Publication number: 20180123251
    Abstract: A periodically-rippled patch antenna structure with metal coated trenches only along one in-plane direction or in two perpendicular in-plane directions on a dielectric substrate and ground plane and methods of fabricating the antenna radiating elements are provided. An optional layer of oxide or nitride can be placed between the substrate and metal layers as an insulation layer. This use of trenches allows for miniaturization of the patch antenna as well as dual-band degeneracy. When a square 1D rippled patch antenna is excited by a microstrip line connected along the ripples, the effective length is longer than with a line orthogonal to the ripples enabling dual mode degeneracy and antennas working at two distinct frequencies of operation.
    Type: Application
    Filed: October 17, 2017
    Publication date: May 3, 2018
    Applicants: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA, KING ABDULAZIZ CITY FOR SCIENCE AND TECHNOLOGY
    Inventors: Kang L. Wang, Mohsen Yazdani, Aryan Navabi-Shirazi, Pedram Khalili Amiri
  • Patent number: 9672886
    Abstract: A fast and low-power sense amplifier and writing circuit for high-speed Magnetic RAM (MRAM) which provides the long retention times and endurance of magnetic tunnel junction (MTJ) cells, while providing faster access speeds, verified writes, and an increased sensing margin. A high-speed and low-power pre-read and write sense amplifier (PWSA) provide VCMA effect precessional switching of MTJ cells which include pre-read and comparison steps which reduce power consumption. An embodiment of the PWSA circuit is described with write and pre-charge circuit, S and D latches, comparison circuit, and a differential amplifier and control circuit.
    Type: Grant
    Filed: May 5, 2015
    Date of Patent: June 6, 2017
    Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Kang L. Wang, Pedram Khalili Amiri, Hochul Lee, Juan G. Alzate
  • Publication number: 20170092842
    Abstract: A magnetic memory bit structure using voltage-controlled magnetic anisotropy (VCMA) for switching the state of at least one magnetic free layer (FL) is configured for inducing strain to achieve very large VCMA coefficients, toward reducing the electric field potential and/or voltage required for switching the state of the magnetic free layer (FL). The disclosed apparatus and method increases voltage-controlled magnetic anisotropy (VCMA) efficiency, which is the change of interfacial magnetic anisotropy energy per unit electric field, thus exploiting strain engineering in designing next generation MeRAM devices which operate more efficiently with lower switching thresholds.
    Type: Application
    Filed: August 29, 2016
    Publication date: March 30, 2017
    Applicants: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA, CALIFORNIA STATE UNIVERSITY, NORTHRIDGE
    Inventors: Pedram Khalili Amiri, Qi Hu, Kang L. Wang, Nicholas Kioussis, Phuong-Vu Ong
  • Publication number: 20170084322
    Abstract: A fast and low-power sense amplifier and writing circuit for high-speed Magnetic RAM (MRAM) which provides the long retention times and endurance of magnetic tunnel junction (MTJ) cells, while providing faster access speeds, verified writes, and an increased sensing margin. A high-speed and low-power pre-read and write sense amplifier (PWSA) provide VCMA effect precessional switching of MTJ cells which include pre-read and comparison steps which reduce power consumption. An embodiment of the PWSA circuit is described with write and pre-charge circuit, S and D latches, comparison circuit, and a differential amplifier and control circuit.
    Type: Application
    Filed: May 5, 2015
    Publication date: March 23, 2017
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Kang L. Wang, Pedram Khalili Amiri, Hochul Lee, Juan G. Alzate
  • Patent number: 9537087
    Abstract: A nanoscale tunnel magneto-resistance (TMR) sensor comprising an in-plane-magnetized reference layer and a free layer comprising interfacial perpendicular anisotropy, wherein the free layer comprises a sensing layer for sensing resistance as a function of applied magnetic field and is tunable to vary the direction of the sensing layer magnetization to be in-plane, canted, or out-of-plane.
    Type: Grant
    Filed: January 27, 2015
    Date of Patent: January 3, 2017
    Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Pedram Khalili Amiri, Zhongming Zeng, Kang L. Wang
  • Patent number: 9520443
    Abstract: Embodiments of the technology implement DIOMEJ cells. In one embodiment, a DIOMEJ cell includes: an MEJ that includes, a ferromagnetic fixed layer, a ferromagnetic free layer, and a dielectric layer interposed between the fixed and free layers, where the fixed layer is magnetically polarized in a first direction, where the free layer has a first easy axis that is aligned with the first direction, and where the MEJ is configured such that when a potential difference is applied across it, the magnetic anisotropy of the free layer is altered such that the relative strength of the magnetic anisotropy along a second easy axis that is orthogonal to the first easy axis, as compared to the strength of the magnetic anisotropy along the first easy axis, is magnified for the duration of the application of the potential difference; and a diode, where the diode and the MEJ are arranged in series.
    Type: Grant
    Filed: July 28, 2015
    Date of Patent: December 13, 2016
    Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Pedram Khalili Amiri, Kang L. Wang
  • Patent number: 9520552
    Abstract: Embodiments of the technology implement DIOMEJ cells. In one embodiment, a DIOMEJ cell includes: an MEJ that includes, a ferromagnetic fixed layer, a ferromagnetic free layer, and a dielectric layer interposed between said fixed and free layers, where the fixed layer is magnetically polarized in a first direction, where the free layer has a first easy axis that is aligned with the first direction, and where the MEJ is configured such that when a potential difference is applied across it, the magnetic anisotropy of the free layer is altered such that the relative strength of the magnetic anisotropy along a second easy axis that is orthogonal to the first easy axis, as compared to the strength of the magnetic anisotropy along the first easy axis, is magnified for the duration of the application of the potential difference; and a diode, where the diode and the MEJ are arranged in series.
    Type: Grant
    Filed: August 13, 2014
    Date of Patent: December 13, 2016
    Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Pedram Khalili Amiri, Kang L. Wang