Patents by Inventor Pedram Khalili Amiri
Pedram Khalili Amiri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240105245Abstract: Embodiments of a Stochastic memristive array (SMA) device based on arrays of voltage-controlled magnetic tunnel junctions (MTJs) are disclosed. The SMA device is based on an array of stochastic (low energy barrier) magnetic tunnel junctions that are connected in parallel which simultaneously exhibits features that include (i) stochasticity and (ii) memristive behavior. The energy barrier of the MJTs may be tuned by an applied voltage (electric field). SMA devices may find applications in emerging computing concepts such as probabilistic computing and memcomputing, among others, providing a pathway towards intelligent hybrid CMOS-spintronic systems.Type: ApplicationFiled: December 6, 2023Publication date: March 28, 2024Inventors: Pedram Khalili Amiri, Giovanni Finocchio
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Patent number: 11930719Abstract: Magnetic memory devices are provided. The devices comprise a first ferromagnetic layer, a second ferromagnetic layer, and a tunnel barrier layer composed of a doped semiconductor (instead of an insulator or a dielectric) between the first and second ferromagnetic layers and forming at least one ferromagnetic-doped semiconductor interface.Type: GrantFiled: January 31, 2020Date of Patent: March 12, 2024Assignee: Northwestern UniversityInventors: Pedram Khalili Amiri, Manijeh Razeghi
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Patent number: 11875833Abstract: Embodiments of a Stochastic memristive array (SMA) device based on arrays of voltage-controlled magnetic tunnel junctions (MTJs) are disclosed. The SMA device is based on an array of stochastic (low energy barrier) magnetic tunnel junctions that are connected in parallel which simultaneously exhibits features that include (i) stochasticity and (ii) memristive behavior. The energy barrier of the MJTs may be tuned by an applied voltage (electric field). SMA devices may find applications in emerging computing concepts such as probabilistic computing and memcomputing, among others, providing a pathway towards intelligent hybrid CMOS-spintronic systems.Type: GrantFiled: August 19, 2021Date of Patent: January 16, 2024Assignee: NORTHWESTERN UNIVERSITYInventors: Pedram Khalili Amiri, Giovanni Finocchio
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Publication number: 20230395112Abstract: According to certain aspects of the present disclosure, a device is provided. The device includes a thin film of cobalt. A platinum layer is disposed on the thin film of cobalt. An aluminum layer is disposed on the platinum layer. The aluminum layer disposed on the platinum layer encapsulates the thin film of cobalt. A plurality of electrical contacts is in electrical communication with the thin film of cobalt. Two electrical contacts of the plurality of electrical contacts are configured to receive a write-current therebetween. Four electrical contacts of the plurality of contacts are configured for reading a 4-point resistance.Type: ApplicationFiled: June 1, 2023Publication date: December 7, 2023Inventors: Matthew A. Grayson, Pedram Khalili-Amiri, Chulin Wang, Claire Cecelia Onsager, Sevde Nur Arpaci, Victor Lopez Dominguez
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Publication number: 20230210014Abstract: A voltage-controlled magnetic anisotropy (VCMA) magnetic tunnel junction (MTJ) device includes a bottom electrode, a bottom CoFeB fixed layer disposed above and in electrical communication with the bottom electrode, a MgO layer disposed above the bottom CoFeB fixed layer, a top CoFeB free layer disposed above the MgO layer, a Mo capping layer disposed above the top CoFeB free layer, and a top electrode disposed above and in electrical communication with the Mo capping layer. A magnetization state of the top CoFeB free layer is switchable between an original state and an opposite state by applying a switching voltage across the MTJ device for a switching duration corresponding to a half period of a magnetic moment precession of the top CoFeB free layer.Type: ApplicationFiled: December 19, 2022Publication date: June 29, 2023Inventor: Pedram Khalili Amiri
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Publication number: 20230210015Abstract: An antiferromagnetic (AFM) memory device includes a heavy metal (HM) layer having electrical terminals at two ends, and an AFM tunnel junction (ATJ) interfaced with the HM layer between the two ends. The ATJ includes an AFM material interfaced with a surface of the HM layer, a tunnel barrier layer including an oxide and interfaced with a top of the AFM layer, and a capping layer interfaced with a top of the tunnel barrier layer. The capping layer includes a heavy metal material or a ferromagnetic material. An electrode disposed on top of the capping layer facilitates reading information from the AFM memory device according to a magnetoresistance value measured between the electrode and one of the terminals of the HM layer. Information is written into the AFM memory device by passing current through the HM layer and below the AFM layer.Type: ApplicationFiled: December 19, 2022Publication date: June 29, 2023Inventor: Pedram Khalili Amiri
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Publication number: 20220309329Abstract: A stochastic computing artificial neural network (SC-ANN) includes magnetic tunnel junction (MTJ) devices configured as true random number generators (TRNGs) to output stochastic bit-streams of random numbers for processing by input, hidden, and/or output nodes of the ANN. The processing may include multiplication by a weighting value corresponding to a respective numerical value from the stochastic bit-streams.Type: ApplicationFiled: March 24, 2022Publication date: September 29, 2022Inventor: Pedram Khalili Amiri
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Patent number: 11367474Abstract: A new type of two-terminal magnetic memory device, referred to as antiferromagnetic voltage-controlled memory (AVM) device is disclosed. Antiferromagnetic (AFM) materials have zero magnetization, which makes it immune to external magnetic fields and opens to the possibility to implement high-density arrays without dipole coupling between adjacent devices. The AVM device combines a new state variable e.g., Néel vector l in a metallic (or non-metallic) AFM material with an electric-field-induced switching mechanism for writing of information. Utilizing electric fields E via an interfacial voltage-controlled magnetic anisotropy (VCMA) effect is a more efficient writing mechanism. The AVM device implements an antiferromagnetic tunnel junction (AFM-TJ) structure to exhibit high or low resistance states (HR, LR) corresponding to binary logic states of zero (0) or one (1). Both the AVM device structure and methods of writing a signal to the AVM device are disclosed.Type: GrantFiled: July 17, 2019Date of Patent: June 21, 2022Assignee: NORTHWESTERN UNIVERSITYInventor: Pedram Khalili Amiri
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Publication number: 20220109103Abstract: Magnetic memory devices are provided. The devices comprise a first ferromagnetic layer, a second ferromagnetic layer, and a tunnel barrier layer composed of a doped semiconductor (instead of an insulator or a dielectric) between the first and second ferromagnetic layers and forming at least one ferromagnetic-doped semiconductor interface.Type: ApplicationFiled: January 31, 2020Publication date: April 7, 2022Inventors: Pedram Khalili Amiri, Manijeh Razeghi
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Publication number: 20210383852Abstract: Embodiments of a Stochastic memristive array (SMA) device based on arrays of voltage-controlled magnetic tunnel junctions (MTJs) are disclosed. The SMA device is based on an array of stochastic (low energy barrier) magnetic tunnel junctions that are connected in parallel which simultaneously exhibits features that include (i) stochasticity and (ii) memristive behavior. The energy barrier of the MJTs may be tuned by an applied voltage (electric field). SMA devices may find applications in emerging computing concepts such as probabilistic computing and memcomputing, among others, providing a pathway towards intelligent hybrid CMOS-spintronic systems.Type: ApplicationFiled: August 19, 2021Publication date: December 9, 2021Inventors: Pedram Khalili Amiri, Giovanni Finocchio
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Publication number: 20210383850Abstract: A new type of two-terminal magnetic memory device, referred to as antiferromagnetic voltage-controlled memory (AVM) device is disclosed. Antiferromagnetic (AFM) materials have zero magnetization, which makes it immune to external magnetic fields and opens to the possibility to implement high-density arrays without dipole coupling between adjacent devices. The AVM device combines a new state variable e.g., Néel vector l in a metallic (or non-metallic) AFM material with an electric-field-induced switching mechanism for writing of information. Utilizing electric fields E via an interfacial voltage-controlled magnetic anisotropy (VCMA) effect is a more efficient writing mechanism. The AVM device implements an antiferromagnetic tunnel junction (AFM-TJ) structure to exhibit high or low resistance states (HR, LR) corresponding to binary logic states of zero (0) or one (1). Both the AVM device structure and methods of writing a signal to the AVM device are disclosed.Type: ApplicationFiled: July 17, 2019Publication date: December 9, 2021Inventor: Pedram Khalili Amiri
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Patent number: 11127446Abstract: Embodiments of a Stochastic memristive array (SMA) device based on arrays of voltage-controlled magnetic tunnel junctions (MTJs) are disclosed. The SMA device is based on an array of stochastic (low energy barrier) magnetic tunnel junctions that are connected in parallel which simultaneously exhibits features that include (i) stochasticity and (ii) memristive behavior. The energy barrier of the MJTs may be tuned by an applied voltage (electric field). SMA devices may find applications in emerging computing concepts such as probabilistic computing and memcomputing, among others, providing a pathway towards intelligent hybrid CMOS-spintronic systems.Type: GrantFiled: July 2, 2020Date of Patent: September 21, 2021Assignee: NORTHWESTERN UNIVERSITYInventors: Pedram Khalili Amiri, Giovanni Finocchio
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Publication number: 20210005236Abstract: Embodiments of a Stochastic memristive array (SMA) device based on arrays of voltage-controlled magnetic tunnel junctions (MTJs) are disclosed. The SMA device is based on an array of stochastic (low energy barrier) magnetic tunnel junctions that are connected in parallel which simultaneously exhibits features that include (i) stochasticity and (ii) memristive behavior. The energy barrier of the MJTs may be tuned by an applied voltage (electric field). SMA devices may find applications in emerging computing concepts such as probabilistic computing and memcomputing, among others, providing a pathway towards intelligent hybrid CMOS-spintronic systems.Type: ApplicationFiled: July 2, 2020Publication date: January 7, 2021Inventors: Pedram Khalili Amiri, Giovanni Finocchio
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Publication number: 20180123251Abstract: A periodically-rippled patch antenna structure with metal coated trenches only along one in-plane direction or in two perpendicular in-plane directions on a dielectric substrate and ground plane and methods of fabricating the antenna radiating elements are provided. An optional layer of oxide or nitride can be placed between the substrate and metal layers as an insulation layer. This use of trenches allows for miniaturization of the patch antenna as well as dual-band degeneracy. When a square 1D rippled patch antenna is excited by a microstrip line connected along the ripples, the effective length is longer than with a line orthogonal to the ripples enabling dual mode degeneracy and antennas working at two distinct frequencies of operation.Type: ApplicationFiled: October 17, 2017Publication date: May 3, 2018Applicants: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA, KING ABDULAZIZ CITY FOR SCIENCE AND TECHNOLOGYInventors: Kang L. Wang, Mohsen Yazdani, Aryan Navabi-Shirazi, Pedram Khalili Amiri
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Patent number: 9672886Abstract: A fast and low-power sense amplifier and writing circuit for high-speed Magnetic RAM (MRAM) which provides the long retention times and endurance of magnetic tunnel junction (MTJ) cells, while providing faster access speeds, verified writes, and an increased sensing margin. A high-speed and low-power pre-read and write sense amplifier (PWSA) provide VCMA effect precessional switching of MTJ cells which include pre-read and comparison steps which reduce power consumption. An embodiment of the PWSA circuit is described with write and pre-charge circuit, S and D latches, comparison circuit, and a differential amplifier and control circuit.Type: GrantFiled: May 5, 2015Date of Patent: June 6, 2017Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Kang L. Wang, Pedram Khalili Amiri, Hochul Lee, Juan G. Alzate
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Publication number: 20170092842Abstract: A magnetic memory bit structure using voltage-controlled magnetic anisotropy (VCMA) for switching the state of at least one magnetic free layer (FL) is configured for inducing strain to achieve very large VCMA coefficients, toward reducing the electric field potential and/or voltage required for switching the state of the magnetic free layer (FL). The disclosed apparatus and method increases voltage-controlled magnetic anisotropy (VCMA) efficiency, which is the change of interfacial magnetic anisotropy energy per unit electric field, thus exploiting strain engineering in designing next generation MeRAM devices which operate more efficiently with lower switching thresholds.Type: ApplicationFiled: August 29, 2016Publication date: March 30, 2017Applicants: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA, CALIFORNIA STATE UNIVERSITY, NORTHRIDGEInventors: Pedram Khalili Amiri, Qi Hu, Kang L. Wang, Nicholas Kioussis, Phuong-Vu Ong
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Publication number: 20170084322Abstract: A fast and low-power sense amplifier and writing circuit for high-speed Magnetic RAM (MRAM) which provides the long retention times and endurance of magnetic tunnel junction (MTJ) cells, while providing faster access speeds, verified writes, and an increased sensing margin. A high-speed and low-power pre-read and write sense amplifier (PWSA) provide VCMA effect precessional switching of MTJ cells which include pre-read and comparison steps which reduce power consumption. An embodiment of the PWSA circuit is described with write and pre-charge circuit, S and D latches, comparison circuit, and a differential amplifier and control circuit.Type: ApplicationFiled: May 5, 2015Publication date: March 23, 2017Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Kang L. Wang, Pedram Khalili Amiri, Hochul Lee, Juan G. Alzate
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Patent number: 9537087Abstract: A nanoscale tunnel magneto-resistance (TMR) sensor comprising an in-plane-magnetized reference layer and a free layer comprising interfacial perpendicular anisotropy, wherein the free layer comprises a sensing layer for sensing resistance as a function of applied magnetic field and is tunable to vary the direction of the sensing layer magnetization to be in-plane, canted, or out-of-plane.Type: GrantFiled: January 27, 2015Date of Patent: January 3, 2017Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Pedram Khalili Amiri, Zhongming Zeng, Kang L. Wang
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Patent number: 9520443Abstract: Embodiments of the technology implement DIOMEJ cells. In one embodiment, a DIOMEJ cell includes: an MEJ that includes, a ferromagnetic fixed layer, a ferromagnetic free layer, and a dielectric layer interposed between the fixed and free layers, where the fixed layer is magnetically polarized in a first direction, where the free layer has a first easy axis that is aligned with the first direction, and where the MEJ is configured such that when a potential difference is applied across it, the magnetic anisotropy of the free layer is altered such that the relative strength of the magnetic anisotropy along a second easy axis that is orthogonal to the first easy axis, as compared to the strength of the magnetic anisotropy along the first easy axis, is magnified for the duration of the application of the potential difference; and a diode, where the diode and the MEJ are arranged in series.Type: GrantFiled: July 28, 2015Date of Patent: December 13, 2016Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Pedram Khalili Amiri, Kang L. Wang
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Patent number: 9520552Abstract: Embodiments of the technology implement DIOMEJ cells. In one embodiment, a DIOMEJ cell includes: an MEJ that includes, a ferromagnetic fixed layer, a ferromagnetic free layer, and a dielectric layer interposed between said fixed and free layers, where the fixed layer is magnetically polarized in a first direction, where the free layer has a first easy axis that is aligned with the first direction, and where the MEJ is configured such that when a potential difference is applied across it, the magnetic anisotropy of the free layer is altered such that the relative strength of the magnetic anisotropy along a second easy axis that is orthogonal to the first easy axis, as compared to the strength of the magnetic anisotropy along the first easy axis, is magnified for the duration of the application of the potential difference; and a diode, where the diode and the MEJ are arranged in series.Type: GrantFiled: August 13, 2014Date of Patent: December 13, 2016Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Pedram Khalili Amiri, Kang L. Wang