Abstract: A circuit includes first, second, and third power supply terminals. The circuit includes an input node coupled to receive a negative voltage and an output node coupled to provide a positive voltage proportional to the negative voltage. The circuit includes a voltage-to-current converter coupled to the first power supply terminal and the input node and configured to generate an intermediate current proportional to the negative voltage at the input node. The circuit also includes a current mirror coupled to the second power supply terminal and third power supply terminal and configured to mirror the intermediate current through a first resistor to provide the positive proportional voltage.

Abstract: Aspects of various embodiments of the present disclosure are directed to applications utilizing voltage regulation. In certain embodiments, an oscillator circuit is configured to generate an oscillating signal having a frequency specified by a frequency control signal. A switching power converter is configured to regulate a voltage at an output node according to a target value. The switching power converter enables a path that provides a current to the output node for cycles of the oscillating signal in which the output voltage is below (or above) a first threshold voltage. The switching power converter prevents the path from being enabled for cycles of the oscillating signal in which the output voltage is above (or below) a second threshold voltage. A control circuit adjusts the frequency control signal based on the number of cycles of the oscillating signal in which the path is presented from being enabled.

Abstract: A circuit includes a first resistive element having a first terminal coupled to an input node to receive a negative voltage, a second resistive element having a first terminal coupled to a first power supply terminal, and a third resistive element having a first terminal coupled to the first power supply terminal. A first current mirror includes a first transistor coupled to a second terminal of the second resistive element and a second transistor coupled to a second terminal of the third resistive element and the first transistor, wherein the output node corresponds to the second terminal of the third resistive element. A second current mirror includes a third transistor coupled to the first transistor and a fourth transistor coupled to the second transistor, third transistor, and a second terminal of the first resistive element. The circuit converts the negative voltage to the positive proportion voltage.

Abstract: Aspects of various embodiments of the present disclosure are directed to applications utilizing voltage regulation. In certain embodiments, an oscillator circuit is configured to generate an oscillating signal having a frequency specified by a frequency control signal. A switching power converter is configured to regulate a voltage at an output node according to a target value. The switching power converter enables a path that provides a current to the output node for cycles of the oscillating signal in which the output voltage is below (or above) a first threshold voltage. The switching power converter prevents the path from being enabled for cycles of the oscillating signal in which the output voltage is above (or below) a second threshold voltage. A control circuit adjusts the frequency control signal based on the number of cycles of the oscillating signal in which the path is presented from being enabled.

Abstract: Aspects of various embodiments of the present disclosure are directed to applications utilizing voltage sampling. In certain embodiments, a sample and hold circuit is configured to sample voltages that exceed a tolerance voltage of components. The circuit includes a first and a second capacitors. In a first mode, a voltage difference between an input node and a first reference voltage is sampled using the first capacitor. Also in the first mode, a voltage stored by the second capacitor is referenced to a second reference voltage and provided to a first output node. In a second mode, a voltage difference between an input node and a first reference voltage is sampled using the second capacitor. Also in the second mode, a voltage stored by the first capacitor is referenced to the second reference voltage and provided to a second output node.

Abstract: Aspects of various embodiments of the present disclosure are directed to applications utilizing oscillator circuits. In certain embodiments, an apparatus includes an oscillator circuit having one or more capacitors. The oscillator circuit is configured to generate an oscillating signal by repeated charging and discharging of the capacitors. The apparatus also includes a control circuit connected to the oscillator. The control circuit is configured to set the oscillation frequency of the oscillator circuit as a non-linear function of an input control signal. For instance, in a more specific embodiment, the control circuit may be configured to set oscillation frequency of the oscillator circuit to a frequency scaled by a value raised to an exponent specified by the input control signal.

Abstract: Systems and methods for managing cold-crank events. In an embodiment, a method may include detecting a cold-crank event and setting a switching circuit to a non-conductive state, where the switching circuit is configured to couple a first regulator to a memory circuit such that setting the switching circuit to the non-conductive state de-couples the memory circuit from the first regulator. The method may also include setting the switching circuit to a conductive state in current limitation mode during a recovery period following the cold-crank event to re-couple the memory circuit to the first regulator. In another embodiment, an electronic device include a switching circuit, a first regulator coupled to a first terminal of the switching circuit, a second regulator coupled to a second terminal of the switching circuit, a logic circuit coupled to the switching circuit, and a memory circuit coupled to the second terminal of the switching circuit.

Abstract: In an embodiment, an electronic device includes an integrated circuit (IC) having a plurality of power domains, a first regulator coupled to a given power domain, a second regulator coupled to the given power domain, and a switching circuit coupled between the first and second regulators and configured to control an amount of current drawn by the power domain from the first and/or second regulators. In another embodiment, a method includes controlling an impedance of a switching circuit to change an amount of current, the switching circuit coupled to a given power domain of an IC configured to operate in a first mode followed by a second mode, where the switching circuit is coupled to a first regulator configured to provide more power to the IC than a second regulator, and a transition period includes turning off the first regulator and turning on the second regulator.

Abstract: Ready-flag circuitry for differential amplifiers. In some embodiments, a semiconductor device may include an amplifier including two inputs, and a ready-flag circuit operably coupled to the amplifier, the ready-flag circuit configured to monitor two or more internal nodes of the amplifier and to produce a signal indicating whether a voltage or current difference between the two inputs has been minimized. In other embodiments, a method may include monitoring, via a ready-flag circuit, a first and a second internal node of a differential amplifier, wherein the differential amplifier is part of a bandgap voltage reference circuit and producing, via the ready-flag circuit, a signal indicating whether an output of the bandgap voltage reference circuit has reached a nominal value.

Abstract: An integrated circuit (IC) with voltage regulation includes high power and low power domains, low and high voltage regulators and a low power regulator. The low voltage regulator powers the high and low power domains when the IC is in a HIGH power mode. The low power regulator receives a voltage from a high voltage regulator and powers the low power domain when the IC is in a LOW power mode. The IC includes a switching module that disconnects the low voltage regulator from the low power domain when the output voltage of the high voltage regulator is lower than a threshold voltage during power-up and connects the low voltage regulator to the low power domain when the voltage regulated by the high voltage regulator exceeds the threshold voltage.

Abstract: Temperature dependent biasing for leakage power reduction. In some embodiments, a semiconductor device may include a biasing circuit configured to generate a voltage that varies dependent upon a temperature of the semiconductor device and a logic circuit operably coupled to the biasing circuit, where the voltage is applied to a bulk terminal of one or more transistors within the logic circuit, and where the voltage has a value outside of a voltage supply range of the logic circuit. In another embodiment, a semiconductor device may include a biasing circuit configured to generate a voltage that varies according to a temperature of the semiconductor device and a power switch operably coupled to the biasing circuit, where the voltage is applied to a gate terminal of the power switch, and where the voltage has a value outside of a voltage supply range of the power switch.

Abstract: Systems and methods for managing cold-crank events. In an embodiment, a method may include detecting a cold-crank event and setting a switching circuit to a non-conductive state, where the switching circuit is configured to couple a first regulator to a memory circuit such that setting the switching circuit to the non-conductive state de-couples the memory circuit from the first regulator. The method may also include setting the switching circuit to a conductive state in current limitation mode during a recovery period following the cold-crank event to re-couple the memory circuit to the first regulator. In another embodiment, an electronic device include a switching circuit, a first regulator coupled to a first terminal of the switching circuit, a second regulator coupled to a second terminal of the switching circuit, a logic circuit coupled to the switching circuit, and a memory circuit coupled to the second terminal of the switching circuit.

Abstract: In an embodiment, an electronic device includes an integrated circuit (IC) having a plurality of power domains, a first regulator coupled to a given power domain, a second regulator coupled to the given power domain, and a switching circuit coupled between the first and second regulators and configured to control an amount of current drawn by the power domain from the first and/or second regulators. In another embodiment, a method includes controlling an impedance of a switching circuit to change an amount of current, the switching circuit coupled to a given power domain of an IC configured to operate in a first mode followed by a second mode, where the switching circuit is coupled to a first regulator configured to provide more power to the IC than a second regulator, and a transition period includes turning off the first regulator and turning on the second regulator.

Abstract: An integrated circuit (IC) with voltage regulation includes high power and low power domains, low and high voltage regulators and a low power regulator. The low voltage regulator powers the high and low power domains when the IC is in a HIGH power mode. The low power regulator receives a voltage from a high voltage regulator and powers the low power domain when the IC is in a LOW power mode. The IC includes a switching module that disconnects the low voltage regulator from the low power domain when the output voltage of the high voltage regulator is lower than a threshold voltage during power-up and connects the low voltage regulator to the low power domain when the voltage regulated by the high voltage regulator exceeds the threshold voltage.

Abstract: Ready-flag circuitry for differential amplifiers. In some embodiments, a semiconductor device may include an amplifier including two inputs, and a ready-flag circuit operably coupled to the amplifier, the ready-flag circuit configured to monitor two or more internal nodes of the amplifier and to produce a signal indicating whether a voltage or current difference between the two inputs has been minimized. In other embodiments, a method may include monitoring, via a ready-flag circuit, a first and a second internal node of a differential amplifier, wherein the differential amplifier is part of a bandgap voltage reference circuit and producing, via the ready-flag circuit, a signal indicating whether an output of the bandgap voltage reference circuit has reached a nominal value.

Abstract: Temperature dependent biasing for leakage power reduction. In some embodiments, a semiconductor device may include a biasing circuit configured to generate a voltage that varies dependent upon a temperature of the semiconductor device and a logic circuit operably coupled to the biasing circuit, where the voltage is applied to a bulk terminal of one or more transistors within the logic circuit, and where the voltage has a value outside of a voltage supply range of the logic circuit. In another embodiment, a semiconductor device may include a biasing circuit configured to generate a voltage that varies according to a temperature of the semiconductor device and a power switch operably coupled to the biasing circuit, where the voltage is applied to a gate terminal of the power switch, and where the voltage has a value outside of a voltage supply range of the power switch.

Abstract: Power monitoring circuitry. In some embodiments, comparator circuitry may be configured to receive a first voltage value and a second voltage value, and to identify the greater of the first and second voltage values. Selector circuitry coupled to the comparator circuitry may be configured to power one or more components within the comparator circuitry with a supply voltage corresponding to the greater voltage value. In other embodiments, a method may include identifying, via a comparator, the largest among a plurality of voltage values, and powering one or more logic components within the comparator with the identified voltage value.

Abstract: Power monitoring circuitry. In some embodiments, comparator circuitry may be configured to receive a first voltage value and a second voltage value, and to identify the greater of the first and second voltage values. Selector circuitry coupled to the comparator circuitry may be configured to power one or more components within the comparator circuitry with a supply voltage corresponding to the greater voltage value. In other embodiments, a method may include identifying, via a comparator, the largest among a plurality of voltage values, and powering one or more logic components within the comparator with the identified voltage value.