Abstract: A baseboard management controller (BMC) of a blade server module in an information handling system may operate as a virtual system BIOS firmware hub that may have automatic firmware updating through a TFTP transfer from a chassis management controller (CMC) or for rack/tower servers from a remote assistant card (RMC). The system BIOS may be stored in a RAM drive or a ROM of the BMC. Valuable printed circuit board real estate and hardware for a firmware hub is no longer necessary since the BMC may have the capacity to act as a virtual system BIOS firmware hub in addition to its other functions.

Abstract: Systems and apparatuses for a security device for a bottle are disclosed.

Abstract: In one embodiment, the present invention includes a method for accessing registers associated with a first thread while executing a second thread. In one such embodiment a method may include preventing an instruction of a first thread that is to access a source operand from a register file of a second thread from executing if a synchronization indicator associated with the source operand indicates incompletion of a producer operation of the second thread, and executing the instruction if the synchronization indicator indicates completion of the producer operation of the second thread. Other embodiments are described and claimed.

Abstract: The present invention is related to stable pharmaceutical formulations to be applied by parenteral (liquids or freeze-dried), or topic way (gel, unguent or cream) that contain different quantities of the recombinant interferons gamma and alpha in synergistic proportions for the treatment of pathological events that contemplate the malignant or benign not-physiological growth of cells in tissue or organs.

Abstract: An information handling system providing remotely accessible in-system debugging functionality is provided. The information handling system may include a first logic device and a remote access card distinct from the first logic device. The remote access card may include a network interface port, a processor, and a second logic device. The network interface port may be coupled to the second logic device and configured to receive a communications link for communications with a remote device. The second logic device may include debugging logic configured to be executed by the processor. The processor may be configured to receive debugging instructions from the remote device via the network interface port and, based at least on the received debugging instructions, execute the debugging logic to communicate with the first logic device via a communication link between the first logic device and the second logic device to facilitate remote debugging of the information handling system.

Abstract: Systems and apparatuses for a magnetically actuable locking mechanism and a security device having a magnetically actuable locking mechanism are disclosed.

Abstract: Systems and apparatus for a security device for an article having a constrained elongate member are disclosed.

Abstract: Systems and apparatuses for a security device having a cable (922) are disclosed.

Abstract: Systems and apparatuses for a magnetically actuable locking mechanism and a security device having a magnetically actuable locking mechanism are disclosed.

Abstract: A recombinant chimeric antagonist formed by a 60 amino acid fragment of the N-terminal region of human interleukin 2 (IL-2) fused to the N-terminal of the extracellular region of the alpha subunit of the gamma IFN (IFN ?) receptor. In vitro this protein has a T cell growth stimulating activity, it inhibits the growth stimulating activity of IL-2 in T cells, it inhibits the induction of HLA-DR by IFN ? and it inhibits the antiproliferative activity of ? IFN. This invention can be applied in the field of medicine for the treatment of several pathologies such as autoimmune diseases, graft rejections, chronic inflammations, sepsis, ischemia and reperfusion syndrome and atherosclerosis.

Abstract: Apparatus and computing systems associated with cache sharing based thread control are described. One embodiment includes a memory to store a thread control instruction and a processor to execute the thread control instruction. The processor is coupled to the memory. The processor includes a first unit to dynamically determine a cache sharing behavior between threads in a multi-threaded computing system and a second unit to dynamically control the composition of a set of threads in the multi-threaded computing system. The composition of the set of threads is based, at least in part, on thread affinity as exhibited by cache-sharing behavior. The thread control instruction controls the operation of the first unit and the second unit.

Abstract: A blade information handling system server prevents excess power demand from blade information handling systems by inventorying the power consumption of each blade information handling system before startup. Another power consumption inventory performed after startup ensures an accurate power consumption inventory for making subsequent startup decision. The baseboard management controller performs the first power consumption inventory with the processing components of the blade information handling system in an off state. The power inventory is communicated to the chassis management controller to obtain authorization to startup based on the power available at the chassis. The second power inventory is performed with the processing components in an on state and forwarded to the chassis management controller for use in subsequent determinations of power available at the chassis.

Abstract: A server information handling system integrated management controller selectively communicates management information between a baseboard management controller and either a network remote console session or local I/O devices, such as a display, a keyboard, a mouse or a KVM appliance. Display information is communicated from the baseboard management controller to a display by writing from the baseboard management controller through a unified memory controller to a display frame buffer for presentation at the display. Keyboard, mouse and KVM information is communicated through a USB host to the baseboard management controller or, in an operational state, is communicated from the USB host to a USB client for use by the server information handling system. In an operational state, a break sequence selectively interfaces the I/O devices with the server information handling system or the baseboard management controller.

Abstract: An apparatus for monitoring the health of a peripheral component of an information handling system. An aggregation logic circuit coupled to a communication path provides data communication with each of a plurality of electrical circuits disposed on the peripheral component, the aggregation logic circuit providing a feedback signal representative of the health of the peripheral component during operation of the peripheral component.

Abstract: A blade information handling system server prevents excess power demand from blade information handling systems by inventorying the power consumption of each blade information handling system before startup. Another power consumption inventory performed after startup ensures an accurate power consumption inventory for making subsequent startup decision. The baseboard management controller performs the first power consumption inventory with the processing components of the blade information handling system in an off state. The power inventory is communicated to the chassis management controller to obtain authorization to startup based on the power available at the chassis. The second power inventory is performed with the processing components in an on state and forwarded to the chassis management controller for use in subsequent determinations of power available at the chassis.

Abstract: An information handling system has the capability of matching UART baud rates and other serial data parameters between a system UART and baseboard management controller (BMC) UART used for serial-over-LAN (SOL) access to the information handling system via an Ethernet connection, either locally or remotely by a user, administrator, maintenance technician, etc. The BMC may snoop set-up data sent to the control register(s) of the system UART, look up a corresponding baud rate from a baud rate table of the BMC and set the BMC UART to match the system UART baud rate and other serial data parameters so that SOL access to the information handling system is available no matter what baud rate and/or serial data parameters an application may have programmed the system UART configuration registers. The BMC may snoop system UART data over a simple data bus such a low pin count (LPC) bus.

Abstract: A baseboard management controller (BMC) of a blade server module in an information handling system may operate as a virtual system BIOS firmware hub that may have automatic firmware updating through a TFTP transfer from a chassis management controller (CMC) or for rack/tower servers from a remote assistant card (RMC). The system BIOS may be stored in a RAM drive or a ROM of the BMC. Valuable printed circuit board real estate and hardware for a firmware hub is no longer necessary since the BMC may have the capacity to act as a virtual system BIOS firmware hub in addition to its other functions.

Abstract: Firmware for a baseboard management controller (BMC) of a blade server module in an information handling system may have automatic firmware corruption recovery and updating through a TFTP transfer from a central storage location having the most recent BMC firmware image. Upon blade power-on or reset the BMC firmware image is checked for corruption and if corrupted a new BMC firmware image is loaded into the BMC memory. If the BMC firmware image is not corrupted then it is checked to determine if it is the latest version. If it is the latest version the BMC starts normal program execution. If not the latest version then the BMC firmware is updated through the TFTP transfer from the central storage location having the most recent BMC firmware image.

Abstract: An information handling system providing remotely accessible in-system debugging functionality is provided. The information handling system may include a first logic device and a remote access card distinct from the first logic device. The remote access card may include a network interface port, a processor, and a second logic device. The network interface port may be coupled to the second logic device and configured to receive a communications link for communications with a remote device. The second logic device may include debugging logic configured to be executed by the processor. The processor may be configured to receive debugging instructions from the remote device via the network interface port and, based at least on the received debugging instructions, execute the debugging logic to communicate with the first logic device via a communication link between the first logic device and the second logic device to facilitate remote debugging of the information handling system.

Abstract: An information handling system having a network interface system operable to provide optional dedicated or shared network interface functionality is provided. The network interface system includes (a) a motherboard including a LAN on motherboard (LOM), a first processor, and a first network port; and (b) a remote management card including a second network port and a second processor including a MAC device. A user may configured the network interface system for either a dedicated network interface mode or a shared network interface mode. In the dedicated mode, the MAC device and the second network port are coupled such that the second processor may communicate with a network management node via the second network port. In the shared mode, the MAC device and the LOM are coupled such that the second processor may communicate with the network management node via the first network port and the LOM.