Abstract: An analog-to-digital converter apparatus for analog source signals of one polarity, includes one comparator formed from transistors, a block of digitally addressable voltage sources to set a reference voltage of the comparator, an asynchronous n-bit digital counter, a block of digitally addressable voltage sources to set the potential to be applied to the signal source, a digital control unit, a block storing the calibration data for an input capacitor of the comparator, and a base-2 multiplier block, being interconnected by lines, including a line connecting the input analog signal to the drain of a pass transistor, a line connecting the block of voltage sources to be connected to the signal source, a line connecting the digital control unit to transistor gates, and a line carrying the signal Vref from the block of digitally addressed voltage sources to the comparator.

Abstract: An analog-to-digital converter apparatus for analog source signals of one polarity, includes one comparator formed from transistors, a block of digitally addressable voltage sources to set a reference voltage of the comparator, an asynchronous n-bit digital counter, a block of digitally addressable voltage sources to set the potential to be applied to the signal source, a digital control unit, a block storing the calibration data for an input capacitor of the comparator, and a base-2 multiplier block, being interconnected by lines, including a line connecting the input analog signal to the drain of a pass transistor, a line connecting the block of voltage sources to be connected to the signal source, a line connecting the digital control unit to transistor gates, and a line carrying the signal Vref from the block of digitally addressed voltage sources to the comparator.

Abstract: An analog-to-digital converter apparatus for analog source signals of one polarity, includes one comparator formed from transistors, a block of digitally addressable voltage sources to set a reference voltage of the comparator, an asynchronous n-bit digital counter, a block of digitally addressable voltage sources to set the potential to be applied to the signal source, a digital control unit, a block storing the calibration data for an input capacitor of the comparator, and a base-2 multiplier block, being interconnected by lines, including a line connecting the input analog signal to the drain of a pass transistor, a line connecting the block of voltage sources to be connected to the signal source, a line connecting the digital control unit to transistor gates, and a line carrying the signal Vref from the block of digitally addressed voltage sources to the comparator.

Abstract: In-pixel circuit architectures for CMOS image sensors are disclosed, which are suitable for avalanche photo-diodes operating either in linear or in non-linear mode. These architectures apply in particular to photo-diodes and image sensors in which CMOS devices are fabricated on thin-film silicon-on-insulator substrates.

Abstract: A new methodology is disclosed to convert analog electric signals into digital data. The method provides a serial scheme without pre-definition of the number of bits (dynamic range). It allows digital processing of the input signal without sampling and holding of the input signal. Processing of the input signal is clock-less and asynchronously dependent on the time-evolution of the input signal itself. Thereby, a programmable, dynamic adjustment of bandwidth (product of dynamic range and speed of conversion) of the analog-to-digital conversion process can be achieved depending on the characteristics of the input signal. Dynamic adjustment of the bandwidth is accomplished by digitally controlling a “threshold” value at the input capacitor of the comparator, which when met by the input signal, triggers a transition at the output of the comparator.