Patents by Inventor Pedro Ramon Gelabert

Pedro Ramon Gelabert has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • ANALOG-TO-DIGITAL CONVERTER WITH DYNAMIC RANGE ENHANCER
    Publication number: 20200304139
    Abstract: A circuit includes a programmable gain amplifier (PGA) having a PGA output. The circuit further includes a delta-sigma modulator having an input coupled to the PGA output. The circuit also includes a digital filter and a dynamic range enhancer (DRE) circuit. The digital filter is coupled to the delta-sigma modulator output. The DRE circuit is coupled to the delta-sigma modulator output and to the PGA. The DRE circuit is configured to monitor a signal level of the delta-sigma modulator output. Responsive to the signal level being less than a DRE threshold, the DRE circuit is configured to program the PGA for a gain level greater than unity gain and to cause the digital filter to implement an attenuation of a same magnitude as the gain level to be programmed into the PGA.
    Type: Application
    Filed: October 23, 2019
    Publication date: September 24, 2020
    Inventors: Uttam Kumar AGARWAL, Anand KANNAN, Ramamurthy VISHWESHWARA, Anand SUBRAMANIAN, Pedro Ramon GELABERT, Diljith Mathal THODI, Abhijit Anant PATKI
  • Analog-to-digital converter with dynamic range enhancer
    Patent number: 10763889
    Abstract: A circuit includes a programmable gain amplifier (PGA) having a PGA output. The circuit further includes a delta-sigma modulator having an input coupled to the PGA output. The circuit also includes a digital filter and a dynamic range enhancer (DRE) circuit. The digital filter is coupled to the delta-sigma modulator output. The DRE circuit is coupled to the delta-sigma modulator output and to the PGA. The DRE circuit is configured to monitor a signal level of the delta-sigma modulator output. Responsive to the signal level being less than a DRE threshold, the DRE circuit is configured to program the PGA for a gain level greater than unity gain and to cause the digital filter to implement an attenuation of a same magnitude as the gain level to be programmed into the PGA.
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: September 1, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Uttam Kumar Agarwal, Anand Kannan, Ramamurthy Vishweshwara, Anand Subramanian, Pedro Ramon Gelabert, Diljith Mathal Thodi, Abhijit Anant Patki