Abstract: Fabricating a photomask includes forming a protection layer over a substrate. A plurality of multilayers of reflecting films are formed over the protection layer. A capping layer is formed over the plurality of multilayers. An absorption layer is formed over capping layer. A first photoresist layer is formed over portions of absorption layer. Portions of the first photoresist layer and absorption layer are patterned, forming first openings in absorption layer. The first openings expose portions of the capping layer. Remaining portions of first photoresist layer are removed and a second photoresist layer is formed over portions of absorption layer. The second photoresist layer covers at least the first openings. Portions of the absorption layer and capping layer and plurality of multilayer of reflecting films not covered by the second photoresist layer are patterned, forming second openings. The second openings expose portions of protection layer and second photoresist layer is removed.

Abstract: A superalloy seamless pipe and a preparation method thereof are provided. The superalloy seamless pipe comprises the following components in percentages by weight: C: 0.01-0.06%, Si: 0.40-1.00%, Mn: 0.30-1.00%, P?0.025%, S?0.020%, Cr: 15.00-17.00%, Ni: 44.00-46.00%, Al: 2.90-3.90%, Ce: 0.01-0.03%, Ti: 0.10-0.30%, N: 0.03-0.08%, and the balance of Fe and inevitable impurities.

Abstract: A chip structure is provided. The chip structure includes a substrate. The chip structure includes an interconnect layer over the substrate. The chip structure includes a conductive pad over the interconnect layer. The chip structure includes a conductive bump over the conductive pad. The conductive bump has a first portion, a second portion, and a neck portion between the first portion and the second portion, the first portion is between the neck portion and the conductive pad, and the neck portion is narrower than both of the first portion and the second portion. The chip structure includes a support layer over the second portion of the conductive bump. A first composition of the support layer is different from a second composition of the conductive bump. The chip structure includes a solder structure over the support layer.

Abstract: The present disclosure provides a semiconductor device that includes a semiconductor fin disposed over a substrate, an isolation structure at least partially surrounding the fin, an epitaxial source/drain (S/D) feature disposed over the semiconductor fin, where an extended portion of the epitaxial S/D feature extends over the isolation structure, and a silicide layer disposed on the epitaxial S/D feature, where the silicide layer covers top, bottom, sidewall, front, and back surfaces of the extended portion of the S/D feature.

Abstract: A method includes forming a multi-layered reflective layer over a substrate; depositing a metal capping layer over the multi-layered reflective layer; depositing a first metal oxide layer over the metal capping layer; depositing a metal nitride layer over the first metal oxide layer; depositing a second metal oxide layer over the metal nitride layer; forming a plurality of features on the second metal oxide layer and the metal nitride layer.

Abstract: The disclosed invention presents a self-tracking reference circuit that compensates for IR drops and achieves the target resistance state at different temperatures after write operations. The disclosed self-tracking reference circuit includes a replica access path, a configurable resistor network, a replica selector mini-array and a step current generator that track PVT variations to provide a PVT tracking level for RRAM verify operation.

Abstract: A semiconductor device includes a substrate, a plurality of nanosheets, a plurality of source/drain (S/D) features, and a gate stack. The substrate includes a first fin and a second fin. The first fin has a first width less than a second width of the second fin. The plurality of nanosheets is disposed on the first fin and the second fin. The plurality of source/drain (S/D) features are located on the first fin and the second fin and abutting the plurality of nanosheets. A bottom surface of the plurality of source/drain (S/D) features on the first fin is equal to or lower than a bottom surface of the plurality of source/drain (S/D) features on the second fin. The gate stack wraps each of the plurality of nanosheets.

Abstract: A multi-channel payment method for a multi-channel payment system comprises the payer or the payee who initiated the payment request logs in to the multi-channel payment system; the payer or the payee who initiated the payment request placing an order in the multi-channel payment system, wherein the order comprises a designated payment gateway; the multi-channel payment system determining a predicted fee of the order according to the designated payment gateway, past order records, and a real-time exchange rate; the multi-channel payment system performing an anti-money laundering verification of the order; the payer reviewing the order and the predicted fee through a multiple auditing method; and the multi-channel payment system executing payment from the payer to the payee according to the order and the designated payment gateway, and storing a payment detail of the order.

Abstract: The present invention provides a smart wearable device, which is held on an upper body of a wearer by a plurality of contact pad sets, and has a connection unit, a first sensing module, a second sensing module, and an extension unit.

Abstract: The present disclosure generally relates to a method for fabricating a nitrogenous steel material (200). The method comprises preparing a material powder in a powder reservoir (120) of an additive manufacturing apparatus (100). The material powder comprises: a metal powder comprising iron; and an alloying powder comprising nitrogen. The method further comprises performing an additive manufacturing process under atmospheric pressure, the additive manufacturing process comprising: displacing layers of the material powder from the powder reservoir (120) to a build platform (130) of the additive manufacturing apparatus (100); and fusing the layers of material powder on the build platform (130) to fabricate the nitrogenous steel material (200).

Abstract: A hot spot defect detecting method and a hot spot defect detecting system are provided. In the method, hot spots are extracted from a design of a semiconductor product to define a hot spot map comprising hot spot groups, wherein local patterns in a same context of the design yielding a same image content are defined as a same hot spot group. During runtime, defect images obtained by an inspection tool performing hot scans on a wafer manufactured with the design are acquired and the hot spot map is aligned to each defect image to locate the hot spot groups. The hot spot defects in each defect image are detected by dynamically mapping the hot spot groups located in each defect image to a plurality of threshold regions and respectively performing automatic thresholding on pixel values of the hot spots of each hot spot group in the corresponding threshold region.

Abstract: The present disclosure describes a method of patterning a semiconductor wafer using extreme ultraviolet lithography (EUVL). The method includes receiving an EUVL mask that includes a substrate having a low temperature expansion material, a reflective multilayer over the substrate, a capping layer over the reflective multilayer, and an absorber layer over the capping layer. The method further includes patterning the absorber layer to form a trench on the EUVL mask, wherein the trench has a first width above a target width. The method further includes treating the EUVL mask with oxygen plasma to reduce the trench to a second width, wherein the second width is below the target width. The method may also include treating the EUVL mask with nitrogen plasma to protect the capping layer, wherein the treating of the EUVL mask with the nitrogen plasma expands the trench to a third width at the target width.

Abstract: A transport mechanism of a server rack including a carrier plate, a server rack disposed and fixed onto a top surface of the carrier plate, and multiple supporting assemblies respectively stacked onto a bottom surface of the carrier plate is provided. Each of the supporting assemblies has at least one cushion member. The cushion member has at least one hollow portion, and an opening of the hollow portion is exposed to an environment. The stiffness of the cushion member is smaller than the stiffness of the carrier plate. A pallet structure is also provided.

Abstract: A metal adhesion layer may be formed on a bottom and a sidewall of a trench prior to formation of a metal plug in the trench. A plasma may be used to modify the phase composition of the metal adhesion layer to increase adhesion between the metal adhesion layer and the metal plug. In particular, the plasma may cause a shift or transformation of the phase composition of the metal adhesion layer to cause the metal adhesion layer to be composed of a (111) dominant phase. The (111) dominant phase of the metal adhesion layer increases adhesion between the metal adhesion layer.

Abstract: A system includes a mask. The system further includes a pellicle frame attached to the mask. The pellicle frame includes a check valve, wherein the check valve is configured to permit gas flow from a first side of the pellicle from to a second side of the pellicle frame. The pellicle frame further includes a flat bottom surface having only a single recess therein, wherein the flat bottom surface is free of an adhesive. The system further includes a gasket within the single recess.

Abstract: The disclosure belongs to the technical field of liquid crystal materials, and specifically relates to a polymerizable compound, a preparation method therefor, and the use thereof. The polymerizable compound has a structure as shown in general formula I. Compared with the existing polymerizable RM, the polymerizable compound has the advantages of a good solubility, a faster polymerization rate, a more complete extent of polymerization, and less residues, thereby improving the problem of poor display to a great extent.

Abstract: A resistive random-access memory (RRAM) circuit includes an RRAM device configured to output a cell current responsive to a bit line voltage, and a current limiter including an input terminal coupled to the RRAM device, first and second parallel current paths configured to conduct the cell current between the input terminal and a reference voltage node, and an amplifier configured to generate a first signal responsive to a voltage level at the input terminal and a reference voltage level. Each of the first and second current paths includes a switching device configured to selectively conduct a portion of the cell current responsive to the first signal.

Abstract: A pellicle for an extreme ultraviolet (EUV) photomask includes a pellicle frame and a main membrane attached to the pellicle frame. The main membrane includes a plurality of nanotubes, and each of the plurality of nanotubes is covered by a coating layer containing Si and one or more metal elements.

Abstract: In a method of cleaning a photo mask, the photo mask is placed on a support such that a pattered surface faces down, and an adhesive sheet is applied to edges of a backside surface of the photo mask.

Abstract: A method includes forming a test pattern and a reference pattern in an absorption layer of a photomask structure. The test pattern has a first trench and a second trench, the reference pattern has a third trench and a fourth trench, the test pattern and the reference pattern have substantially the same dimension in a top view, and the second trench is deeper than the first trench, the third trench, and the fourth trench. The method further includes emitting a light beam to the test pattern to obtain a first interference pattern reflected from the test pattern, emitting the light beam to the reference pattern to obtain a second interference pattern reflected from the reference pattern; and comparing the first interference pattern with the second interference pattern to obtain a measured complex refractive index of the absorption layer.