Patents by Inventor Pei Chen
Pei Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250118666Abstract: A semiconductor structure and method of manufacturing a semiconductor structure are provided. The semiconductor structure includes a substrate and at least one contact plug. The substrate has an epi-layer. The contact plug is formed on the epi-layer and includes a silicide cap disposed on the epi-layer; a conductive pillar disposed on the silicide cap such that the conductive pillar electrically connects to the epi-layer via the silicide cap; and a hybrid liner. The hybrid liner surrounds the conductive pillar and includes a lower portion abutting the silicide cap and having a nitride material and an upper portion abutting the conductive pillar and having an oxidized nitride material. Due to the hybrid liner, a semiconductor structure with increased capacitance and decreased resistivity can be obtained.Type: ApplicationFiled: October 10, 2023Publication date: April 10, 2025Inventors: TZU PEI CHEN, MIN-HSUAN LU, HAO-HENG LIU, YUTING CHENG, HSU-KAI CHANG, PO-CHIN CHANG, OLIVIA PEI-HUA LEE, SHENG-TSUNG WANG, HUAN-CHIEH SU, SUNG-LI WANG, PINYEN LIN
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Patent number: 12261082Abstract: The present disclosure describes a semiconductor device with a nitrided capping layer and methods for forming the same. One method includes forming a first conductive structure in a first dielectric layer on a substrate, depositing a second dielectric layer on the first conductive structure and the first dielectric layer, and forming an opening in the second dielectric layer to expose the first conductive structure and a portion of the first dielectric layer. The method further includes forming a nitrided layer on a top portion of the first conductive structure, a top portion of the portion of the first dielectric layer, sidewalls of the opening, and a top portion of the second dielectric layer, and forming a second conductive structure in the opening, where the second conductive structure is in contact with the nitrided layer.Type: GrantFiled: January 18, 2022Date of Patent: March 25, 2025Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Po-Chin Chang, Lin-Yu Huang, Shuen-Shin Liang, Sheng-Tsung Wang, Cheng-Chi Chuang, Chia-Hung Chu, Tzu Pei Chen, Yuting Cheng, Sung-Li Wang
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Publication number: 20250071047Abstract: Disclosed are a network card communication method and apparatus for an AI training platform, a device, and a medium. The method includes: building a switch network topology on the basis of a spine-leaf network, and configuring a preset number of virtual local area networks for each leaf switch in the switch network topology; virtualizing a physical network card to obtain virtual network cards, allocating the virtual network cards to corresponding job-containers according to a preset allocation rule, and allocating, to each virtual network card in the job-containers, different sub-networks corresponding to the virtual local area networks; and adding a corresponding sub-network communication policy routing rule to a pod where each job-container is located, whereby a virtual network card in the job-container sends training data to the remaining virtual network cards on a basis of the sub-network communication policy routing rule.Type: ApplicationFiled: June 30, 2022Publication date: February 27, 2025Applicant: Suzhou Metabrain Intelligent Technology Co., Ltd.Inventors: Wenxiao WANG, Yingjie KANG, Dekui WANG, Pei CHEN
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Patent number: 12216980Abstract: A method includes the following operations: identifying a layer of a first layout based on a first violation generated on the layer; generating a metal density value associated with the layer; when the metal density value is larger than or equal to a preset value, classifying the first violation into a first class corresponding to routing congestions of the first layout; when the first violation is classified into the first class, assigning, to the first violation, a first operation of a plurality of first pre-stored operations corresponding to the first class; and performing the first operation to the first layout to generate a second layout.Type: GrantFiled: July 27, 2022Date of Patent: February 4, 2025Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., TSMC NANJING COMPANY LIMITEDInventors: Yi-Lin Chuang, Song Liu, Pei-Pei Chen, Heng-Yi Lin, Shih-Yao Lin, Chin-Hsien Wang
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Publication number: 20250035894Abstract: A head-mounted display device and a zoomable curved optical device thereof is disclosed. The zoomable curved optical device includes a curved polarization reflection film, a waveplate, a half-mirror film, and a zoomable module. The waveplate has a first surface and a second surface opposite to each other. The half-mirror film is arranged on the first surface of the waveplate. The zoomable module is adhered to the second surface of the waveplate with an optical adhesive. The curved polarization reflection film is arranged on the zoomable module. The head-mounted display device and the zoomable curved optical device thereof adopt a polarization reflection film with the shorter radius of curvature to have lightweight and slim properties.Type: ApplicationFiled: September 5, 2023Publication date: January 30, 2025Inventors: KUN-CHIH HUNG, TING-HUI CHEN, PO-LUN CHEN, YUN-PEI CHEN
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Publication number: 20250035947Abstract: A zoom optical system includes a first lens, a transreflective coating layer, a liquid crystal layer, a substrate, a polarizing reflector film layer and a second lens. The first lens has a first surface and an opposite second surface. The transreflective coating layer adheres to the first surface of the first lens. The liquid crystal layer adheres to the second surface of the first lens. The substrate adheres to a surface facing away the first lens of the liquid crystal layer. The polarizing reflector film layer is located at a side of the substrate facing away the liquid crystal layer. The second lens adheres to the polarizing reflector film layer by an optical adhesive layer.Type: ApplicationFiled: September 13, 2023Publication date: January 30, 2025Inventors: Yi Chen YANG, Ting Hui CHEN, Po Lun CHEN, Yun Pei CHEN
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Publication number: 20250033342Abstract: Disclosed is a curved surface lens laminating fixture, comprising: a first cavity housing a detachable first laminating component, and a second cavity accommodating a detachable second laminating component. The first cavity has a plurality of detachable locking components and one or more optical scale. The first cavity is connected to a vacuum device and can form a vacuum state by the vacuum device. The second cavity has a plurality of grooves corresponding to the locking components. The second cavity is connected to the vacuum device and can form a vacuum state by the vacuum device.Type: ApplicationFiled: September 28, 2023Publication date: January 30, 2025Inventors: JYUN-YI LUO, PO-LUN CHEN, YUN-PEI CHEN
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Publication number: 20250036002Abstract: An optical module includes a quarter wave plate, a first polarization converter, a second polarization, a lens assembly and a polarization reflection film. The quarter wave plate converts a polarization state of image light received. The first polarization converter and the second polarization converter receive the image light from the quarter-wave plate and focus the image light to a target position. The lens assembly includes a liquid crystal lens with a flat surface and a curved surface. The curved surface protrudes towards the quarter wave plate to make the liquid crystal lens to deflect the image light. The polarization reflection film receives the image light from the second polarization converter. The polarization reflection film is configured to transmit the image light having a target polarization state. The image light from the polarization reflection film converges at the target position to display an image.Type: ApplicationFiled: November 8, 2023Publication date: January 30, 2025Inventors: Kun-Chih Hung, Ting-Hui Chen, Po-Lun Chen, Yun-Pei Chen
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Publication number: 20250028220Abstract: A fixation fixture includes a lower fixture, a middle fixture, and an upper fixture. The lower fixture includes a loading stage for carrying an object. The middle fixture is removably installed on the lower fixture and defines a through hole to expose the loading stage. A retaining edge extends from wall of the through hole. The upper fixture is removably installed on the middle fixture and extends in the through hole. A processing device and a method for making a liquid crystal lens are also provided.Type: ApplicationFiled: August 22, 2023Publication date: January 23, 2025Inventors: CHIEN-CHENG CHEN, PO-LUN CHEN, YUN-PEI CHEN
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Publication number: 20250028206Abstract: A friction alignment device for a curved substrate, which includes: a rotating sleeve, a friction alignment roller, a carrying device and a movable platform. The friction alignment roller is connected to the rotating sleeve and has a curved plane. The carrying device adsorbs a curved substrate to a carrying curved surface. Among them, the carrying device adjusts a height so that the curved plane and the curved substrate are in contact with an alignment pressure, and the rotating sleeve is used to rub the curved substrate, and at the same time, the movable platform performs a displacement of the height, and the curved substrate undergoes three-dimensional friction alignment.Type: ApplicationFiled: October 25, 2023Publication date: January 23, 2025Inventors: CHIEN-CHENG CHEN, PO-LUN CHEN, YUN-PEI CHEN
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Publication number: 20250031404Abstract: A semiconductor device may include one or more transistor structures that include a plurality of source/drain regions and a gate structure between the source/drain regions. The semiconductor device may further include one or more dielectric layers between a source/drain contact structure and a gate structure of the one or more of the transistor structures. The one or more dielectric layers may be manufactured using on oxidation treatment process to tune the dielectric constant of the one or more dielectric layers. The dielectric constant of the one or more dielectric layers may be tuned to reduce the parasitic capacitance between the source/drain contact structure and the gate structure (which are conductive structures). In particular, the dielectric constant of the one or more spacer dielectric may be tuned using the oxidation treatment process to lower the as-deposited dielectric constant of the one or more dielectric layers.Type: ApplicationFiled: July 21, 2023Publication date: January 23, 2025Inventors: Min-Hsuan LU, Sheng-Tsung WANG, Huan-Chieh SU, Tzu Pei CHEN, Hao-Heng LIU, Chien-Hung LIN, Chih-Hao WANG
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Publication number: 20250022802Abstract: An integrated circuit (IC) with conductive structures and a method of fabricating the IC are disclosed. The method includes depositing a first dielectric layer on a semiconductor device, forming a conductive structure in the first dielectric layer, removing a portion of the first dielectric layer to expose a sidewall of the conductive structure, forming a barrier structure surrounding the sidewall of the conductive structure, depositing a conductive layer on the barrier structure, and performing a polishing process on the barrier structure and the conductive layer.Type: ApplicationFiled: July 13, 2023Publication date: January 16, 2025Applicant: Taiwan Semiconductor Manufacturing Co., LtdInventors: Tzu Pei Chen, Sung-Li Wang, Shin-Yi Yang, Po-Chin Chang, Yuting Cheng, Chia-Hung Chu, Chun-Hung Liao, Harry CHIEN, Chia-Hao Chang, Pinyen LIN
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Publication number: 20250006742Abstract: A semiconductor device that has two transistors and a source/drain contact. The first transistor has a layer of semiconductor material that acts as a channel, a structure that serves as a gate and wraps around the semiconductor channel layer, and two epitaxy structures on either end of the semiconductor channel layer that function as the source and drain. The second transistor is situated above the first transistor and has similar components, including a semiconductor channel layer, gate structure, and source/drain epitaxy structures. The connection between the first and second source/drain epitaxy structures is made by a source/drain contact that passes through one of the second source/drain epitaxy structures. This contact is made up of a metal plug and a metal liner that lines the plug.Type: ApplicationFiled: July 1, 2023Publication date: January 2, 2025Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yuting CHENG, Tzu Pei CHEN, Kuan-Kan HU, Shao-An WANG, Jung-Hao CHANG, Sung-Li WANG
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Publication number: 20250006803Abstract: A method includes forming a first transistor over a substrate, in which the first transistor includes first source/drain epitaxy structures; forming a second transistor over the first transistor, in which the second transistor includes second source/drain epitaxy structures; forming an opening extending through one of the second source/drain epitaxy structures and exposing a top surface of one of the first source/drain epitaxy structures; performing a first deposition process to form a first metal in the opening, in which a first void is formed in the first metal during the first deposition process; performing a first etching back process to the first metal until the first void is absent; and performing a second deposition process to form a second metal in the opening and over the first metal.Type: ApplicationFiled: June 28, 2023Publication date: January 2, 2025Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY,, LTD.Inventors: Yuting CHENG, Kuan-Kan HU, Tzu Pei CHEN, Chia-Hung CHU, Po-Chin CHANG, Sung-Li WANG
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Patent number: 12174375Abstract: A head-mounted display device and a zoomable optical device thereof is disclosed. The zoomable optical device includes a polarization reflection film, a waveplate, a half-mirror film, and a zoomable module. The zoomable module includes a first conductive light-transmitting substrate, a second conductive light-transmitting substrate, and a third conductive light-transmitting substrate. The third conductive light-transmitting substrate is arranged between the first conductive light-transmitting substrate and the second conductive light-transmitting substrate. The first conductive light-transmitting substrate is adhered to the waveplate with an optical-grade transparent adhesive. The polarization reflection film is directly arranged on the second conductive light-transmitting substrate.Type: GrantFiled: September 5, 2023Date of Patent: December 24, 2024Assignees: Interface Technology (Chengdu) Co., Ltd., Interace Optoelectronics (Shenzhen) Co., Ltd., General Interface Solution LimitedInventors: Kun-Chih Hung, Ting-Hui Chen, Po-Lun Chen, Yun-Pei Chen
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Publication number: 20240420255Abstract: Systems and methods for use in assessing a treatment trial in an agricultural field. One example method includes, for each of multiple treatment trials in agricultural fields, generating, by a computing device, a post-harvest trial block, based on multiple data layers associated with the agricultural field, where the post-harvest trial block defines an area of the agricultural field associated with the treatment trial; clustering, by a computing device, a training set of the post-harvest trial block based on one or more geospatial features of the areas of the post-harvest trial blocks; training, by the computing device, a model to indicate a label for a target post-harvest trial block based on the one or more geospatial features of an area of the target post-harvest trial block; and storing the label in a memory.Type: ApplicationFiled: June 12, 2024Publication date: December 19, 2024Inventors: Jigyasa BHAGAT, Pei-Chen CHEN, Jake A. KING, Jacob P. MCDANIEL, Nicholas P. OCHS, Jiahao SUN
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Publication number: 20240406076Abstract: The present disclosure provides a configuration method for virtual network interface card resource, including: integrating a plurality of virtual network interface cards in a node where a container group is located, so as to obtain a virtual network interface card set including a plurality of virtual network interface card groups; assigning a target virtual network interface card group for the container group from the virtual network interface card set; analyzing the target virtual network interface card group to obtain address information of target virtual network interface cards in the target virtual network interface card group; and configuring a virtual network interface card resource for the container group according to the address information.Type: ApplicationFiled: November 16, 2022Publication date: December 5, 2024Applicant: SUZHOU METABRAIN INTELLIGENT TECHNOLOGY CO., LTD.Inventors: Wenxiao WANG, Pei CHEN, Dekui WANG
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Patent number: 12145353Abstract: A coating apparatus for a substrate with a curved surface includes a platform, a coating assembly, a carrying stage, and a transfer printing assembly. The coating assembly includes a push frame mounted on the platform and a coating wire rod disposed on the push frame. The push frame can push the coating wire rod to scrape a glue on a flat surface of the platform to form a glue layer on the flat surface. The carrying stage can hold the substrate. The transfer printing assembly includes a carrier and an elastic transfer printing head. The carrier is horizontally movable above the platform and the carrying stage. The elastic transfer printing head is disposed on a bottom of the carrier and is vertically movable, and can attach the glue layer on the flat surface and press against the curved surface to transfer the attached glue layer to the curved surface.Type: GrantFiled: September 1, 2023Date of Patent: November 19, 2024Assignees: Interface Technology (ChengDu) Co., Ltd., Interface Optoelectronics (ShenZhen) Co., Ltd., General Interface Solution LimitedInventors: Chien Cheng Chen, Po Lun Chen, Yun Pei Chen
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Publication number: 20240360489Abstract: Methods of preparing highly purified steviol glycosides are described. The methods include utilizing enzyme preparations and recombinant microorganisms for converting various starting compositions to target steviol glycosides. The highly purified steviol glycosides are useful as non-caloric sweetener, flavor enhancer, sweetness enhancer, flavor stabilizer, flavoring with modifying properties (FMP), foaming suppressor and solubility enhancing agent in consumable products such as any food, beverages, pharmaceutical compositions, tobacco products, nutraceutical compositions, and oral hygiene compositions.Type: ApplicationFiled: June 28, 2022Publication date: October 31, 2024Inventors: Avetik MARKOSYAN, Siew Yin CHOW, Kristina CHKHAN, Khairul NIZAM BIN NAWI, Saravanan A/L RAMANDACH, Mohamad Afzaal Bin HASIM, Pei Chen KOH
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Publication number: 20240343160Abstract: A multi-battery control system, for an electric vehicle, includes a main battery module, comprising a main controller and a main battery, wherein the main controller controls the main battery to provide current to a motor module of the electric vehicle, and the main controller obtains a first state of charge (SoC) value and a first battery temperature of the main battery; and an auxiliary battery module, comprising an auxiliary controller and an auxiliary battery, wherein the main controller utilizes a communication interface to communicate with the auxiliary controller to control the auxiliary battery module, the auxiliary battery module selectively provides current to the motor module or charges the main battery, and the main controller obtains a second SoC value and a second battery temperature of the auxiliary battery through the communication interface.Type: ApplicationFiled: March 13, 2024Publication date: October 17, 2024Applicant: Darfon Energy Technology Corp.Inventor: Pei-Chen Li