Patents by Inventor Pei-Chia CHEN

Pei-Chia CHEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11948840
    Abstract: In an embodiment, a method includes forming a first fin and a second fin within an insulation material over a substrate, the first fin and the second fin includes different materials, the insulation material being interposed between the first fin and the second fin, the first fin having a first width and the second fin having a second width; forming a first capping layer over the first fin; and forming a second capping layer over the second fin, the first capping layer having a first thickness, the second capping layer having a second thickness different from the first thickness.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hung-Yao Chen, Pin-Chu Liang, Hsueh-Chang Sung, Pei-Ren Jeng, Yee-Chia Yeo
  • Publication number: 20240055230
    Abstract: Embodiments described herein relate to process systems for cleaning semiconductor process chamber components. The process systems include a process chamber having process chamber components. The process chamber components include a substrate support disposed within a chamber volume of the process chamber. A gas distribution assembly faces the substrate support. A gas baffle is fluidly coupled to the gas distribution assembly. A sensor system is coupled to the process chamber and is configured to monitor at least one characteristic of the volume of the process chamber. A dynamic gas assist is fluidly coupled to the gas baffle and is communicatively coupled to the sensor.
    Type: Application
    Filed: August 15, 2022
    Publication date: February 15, 2024
    Inventors: Jong Yun KIM, Kim Seong SIM, Roman M. MOSTOVOY, Won Ho SUNG, Pei-Chia CHEN
  • Patent number: 11637011
    Abstract: A method for forming a silicon oxide film on a step formed on a substrate includes: (a) designing a topology of a final silicon oxide film by preselecting a target portion of an initial silicon nitride film to be selectively deposited or removed or reformed with reference to a non-target portion of the initial silicon nitride film resulting in the final silicon oxide film; and (b) forming the initial silicon nitride film and the final silicon oxide film on the surfaces of the step according to the topology designed in process (a), wherein the initial silicon nitride film is deposited by ALD using a silicon-containing precursor containing halogen, and the initial silicon nitride film is converted to the final silicon oxide film by oxidizing the initial silicon nitride film without further depositing a film wherein a Si—N bond in the initial silicon nitride film is converted to a Si—O bond.
    Type: Grant
    Filed: October 12, 2020
    Date of Patent: April 25, 2023
    Assignee: ASM IP Holding B.V.
    Inventors: Atsuki Fukazawa, Masaru Zaitsu, Pei-Chia Chen
  • Publication number: 20210118667
    Abstract: A method for forming a silicon oxide film on a step formed on a substrate includes: (a) designing a topology of a final silicon oxide film by preselecting a target portion of an initial silicon nitride film to be selectively deposited or removed or reformed with reference to a non-target portion of the initial silicon nitride film resulting in the final silicon oxide film; and (b) forming the initial silicon nitride film and the final silicon oxide film on the surfaces of the step according to the topology designed in process (a), wherein the initial silicon nitride film is deposited by ALD using a silicon-containing precursor containing halogen, and the initial silicon nitride film is converted to the final silicon oxide film by oxidizing the initial silicon nitride film without further depositing a film wherein a Si—N bond in the initial silicon nitride film is converted to a Si—O bond.
    Type: Application
    Filed: October 12, 2020
    Publication date: April 22, 2021
    Inventors: Atsuki Fukazawa, Masaru Zaitsu, Pei-Chia Chen
  • Patent number: 10276747
    Abstract: A substrate wafer composed of a hexagonal single crystal material including a C crystalline plane, an A crystalline plane, and an M-axis direction includes a top surface is a C-axis plane; a first side connecting to the aforementioned top surface and being substantially a curve line viewing from the direction perpendicular to the aforementioned C crystalline plane and including a curvature center; and a second side connecting to the aforementioned first side; and wherein there is a line segment defined by a shortest distance between the aforementioned second side and the aforementioned curvature center, and the aforementioned line segment is not parallel with the aforementioned M-axis direction.
    Type: Grant
    Filed: April 20, 2017
    Date of Patent: April 30, 2019
    Assignee: EPISTAR CORPORATION
    Inventors: Kai Shen Chen, Hsin Hsiung Huang, Wan Jung Lee, Pei Chia Chen, Yung Hsin Tai
  • Publication number: 20170309783
    Abstract: A substrate wafer composed of a hexagonal single crystal material including a C crystalline plane, an A crystalline plane, and an M-axis direction includes a top surface is a C-axis plane; a first side connecting to the aforementioned top surface and being substantially a curve line viewing from the direction perpendicular to the aforementioned C crystalline plane and including a curvature center; and a second side connecting to the aforementioned first side; and wherein there is a line segment defined by a shortest distance between the aforementioned second side and the aforementioned curvature center, and the aforementioned line segment is not parallel with the aforementioned M-axis direction.
    Type: Application
    Filed: April 20, 2017
    Publication date: October 26, 2017
    Inventors: Kai Shen CHEN, Hsin Hsiung HUANG, Wan Jung LEE, Pei Chia CHEN, Yung Hsin TAI
  • Patent number: 9583677
    Abstract: A method of manufacturing a light-emitting diode comprises the steps of providing a substrate comprising an upper surface and a bottom surface opposite to the upper surface; providing a semiconductor stack layer on the upper surface, wherein the semiconductor stack layer comprises a first type semiconductor layer having a first surface, a light-emitting layer on the first type semiconductor layer for emitting light, and a second type semiconductor layer on the light-emitting layer; treating the first surface to form a second surface, wherein the second surface is flatter than the first surface; and providing a laser beam through the second surface to cut the substrate.
    Type: Grant
    Filed: April 20, 2015
    Date of Patent: February 28, 2017
    Assignee: EPISTAR CORPORATION
    Inventors: Liang-Sheng Chi, Pei-Chia Chen, Chih-Hao Chen
  • Publication number: 20150228856
    Abstract: A method of manufacturing a light-emitting diode comprises the steps of providing a substrate comprising an upper surface and a bottom surface opposite to the upper surface; providing a semiconductor stack layer on the upper surface, wherein the semiconductor stack layer comprises a first type semiconductor layer having a first surface, a light-emitting layer on the first type semiconductor layer for emitting light, and a second type semiconductor layer on the light-emitting layer; treating the first surface to form a second surface, wherein the second surface is flatter than the first surface; and providing a laser beam through the second surface to cut the substrate.
    Type: Application
    Filed: April 20, 2015
    Publication date: August 13, 2015
    Inventors: Liang-Sheng CHI, Pei-Chia CHEN, Chih-Hao CHEN
  • Patent number: 9012933
    Abstract: A light-emitting diode includes a substrate, the substrate including an upper surface, a bottom surface opposite to the upper surface, and a side surface; a first type semiconductor layer on the upper surface, wherein the first type semiconductor layer includes a first portion and a second portion, and the second portion includes an edge surrounding the first portion; a light-emitting layer on the first portion; and a second type semiconductor layer on the light-emitting layer, wherein the second portion includes a first surface and a second surface, and a first distance is between the first surface and the upper surface, and a second distance is between the second surface and the upper surface and is smaller than the first distance; wherein the first surface is rougher than the second surface, and the second surface is located at the edge.
    Type: Grant
    Filed: April 8, 2013
    Date of Patent: April 21, 2015
    Assignee: Epistar Corporation
    Inventors: Liang-Sheng Chi, Pei-Chia Chen, Chih-Hao Chen
  • Publication number: 20140299901
    Abstract: A light-emitting diode, comprising: a substrate, the substrate comprising an upper surface, a bottom surface opposite to the upper surface, and a side surface; a first type semiconductor layer on the upper surface, wherein the first type semiconductor layer comprises a first portion and a second portion, and the second portion comprises an edge surrounding the first portion; a light-emitting layer on the first portion; and a second type semiconductor layer on the light-emitting layer, wherein the second portion comprising a first surface and a second surface, and a first distance is between the first surface and the upper surface, and a second distance is between the second surface and the upper surface and is smaller than the first distance; wherein the first surface is rougher than the second surface, and the second surface is located at the edge.
    Type: Application
    Filed: April 8, 2013
    Publication date: October 9, 2014
    Applicant: Epistar Corporation
    Inventors: Liang-Sheng CHI, Pei-Chia CHEN, Chih-Hao CHEN