Patents by Inventor Pei-Chia CHEN
Pei-Chia CHEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250008823Abstract: Sub-pixel circuits and methods of forming sub-pixel circuits that may be utilized in a display, such as an organic light-emitting diode (OLED) display, are provided. In one example, a sub-pixel includes a substrate, adjacent overhang structures, an anode, an OLED material, a cathode, an encapsulation layer stack. The encapsulation layer stack includes a first layer, a second layer disposed over the first layer, and a third layer. The first layer and the second layer have a first portion disposed over the cathode, a second portion disposed over a sidewall of each overhang structure, and a third portion disposed under an underside surface of an extension of each overhang structure. A gap is defined by contact of the first portion of the second layer and the third portion of the second layer. The third layer is disposed over the second layer outside of the gap.Type: ApplicationFiled: March 4, 2024Publication date: January 2, 2025Inventors: Zongkai WU, Pei Chia CHEN, Wen-Hao WU, Jungmin LEE, Chung-chia CHEN, Yu-Hsin LIN, Kevin CHEN, Wenhui LI, Yu-Min WANG, Lai ZHAO, Soo Young CHOI
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Publication number: 20240321555Abstract: Embodiments described herein relate to process systems for cleaning semiconductor process chamber components. In one example, a process system include a process chamber having process chamber components. The process chamber components include a substrate support disposed within a chamber volume of the process chamber. A gas distribution assembly faces the substrate support. A gas baffle is fluidly coupled to the gas distribution assembly. A sensor system is coupled to the process chamber and is configured to monitor at least one characteristic of the volume of the process chamber. A dynamic gas assist is fluidly coupled to the gas baffle and is communicatively coupled to the sensor.Type: ApplicationFiled: June 3, 2024Publication date: September 26, 2024Inventors: Jongyun KIM, Kimseong SIM, Roman M. MOSTOVOY, Won Ho SUNG, Pei Chia CHEN
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Patent number: 12014902Abstract: Embodiments described herein relate to process systems for cleaning semiconductor process chamber components. The process systems include a process chamber having process chamber components. The process chamber components include a substrate support disposed within a chamber volume of the process chamber. A gas distribution assembly faces the substrate support. A gas baffle is fluidly coupled to the gas distribution assembly. A sensor system is coupled to the process chamber and is configured to monitor at least one characteristic of the volume of the process chamber. A dynamic gas assist is fluidly coupled to the gas baffle and is communicatively coupled to the sensor.Type: GrantFiled: August 15, 2022Date of Patent: June 18, 2024Assignee: Applied Materials, Inc.Inventors: Jong Yun Kim, Kim Seong Sim, Roman M. Mostovoy, Won Ho Sung, Pei-Chia Chen
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Publication number: 20240055230Abstract: Embodiments described herein relate to process systems for cleaning semiconductor process chamber components. The process systems include a process chamber having process chamber components. The process chamber components include a substrate support disposed within a chamber volume of the process chamber. A gas distribution assembly faces the substrate support. A gas baffle is fluidly coupled to the gas distribution assembly. A sensor system is coupled to the process chamber and is configured to monitor at least one characteristic of the volume of the process chamber. A dynamic gas assist is fluidly coupled to the gas baffle and is communicatively coupled to the sensor.Type: ApplicationFiled: August 15, 2022Publication date: February 15, 2024Inventors: Jong Yun KIM, Kim Seong SIM, Roman M. MOSTOVOY, Won Ho SUNG, Pei-Chia CHEN
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Patent number: 11637011Abstract: A method for forming a silicon oxide film on a step formed on a substrate includes: (a) designing a topology of a final silicon oxide film by preselecting a target portion of an initial silicon nitride film to be selectively deposited or removed or reformed with reference to a non-target portion of the initial silicon nitride film resulting in the final silicon oxide film; and (b) forming the initial silicon nitride film and the final silicon oxide film on the surfaces of the step according to the topology designed in process (a), wherein the initial silicon nitride film is deposited by ALD using a silicon-containing precursor containing halogen, and the initial silicon nitride film is converted to the final silicon oxide film by oxidizing the initial silicon nitride film without further depositing a film wherein a Si—N bond in the initial silicon nitride film is converted to a Si—O bond.Type: GrantFiled: October 12, 2020Date of Patent: April 25, 2023Assignee: ASM IP Holding B.V.Inventors: Atsuki Fukazawa, Masaru Zaitsu, Pei-Chia Chen
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Publication number: 20210118667Abstract: A method for forming a silicon oxide film on a step formed on a substrate includes: (a) designing a topology of a final silicon oxide film by preselecting a target portion of an initial silicon nitride film to be selectively deposited or removed or reformed with reference to a non-target portion of the initial silicon nitride film resulting in the final silicon oxide film; and (b) forming the initial silicon nitride film and the final silicon oxide film on the surfaces of the step according to the topology designed in process (a), wherein the initial silicon nitride film is deposited by ALD using a silicon-containing precursor containing halogen, and the initial silicon nitride film is converted to the final silicon oxide film by oxidizing the initial silicon nitride film without further depositing a film wherein a Si—N bond in the initial silicon nitride film is converted to a Si—O bond.Type: ApplicationFiled: October 12, 2020Publication date: April 22, 2021Inventors: Atsuki Fukazawa, Masaru Zaitsu, Pei-Chia Chen
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Patent number: 10276747Abstract: A substrate wafer composed of a hexagonal single crystal material including a C crystalline plane, an A crystalline plane, and an M-axis direction includes a top surface is a C-axis plane; a first side connecting to the aforementioned top surface and being substantially a curve line viewing from the direction perpendicular to the aforementioned C crystalline plane and including a curvature center; and a second side connecting to the aforementioned first side; and wherein there is a line segment defined by a shortest distance between the aforementioned second side and the aforementioned curvature center, and the aforementioned line segment is not parallel with the aforementioned M-axis direction.Type: GrantFiled: April 20, 2017Date of Patent: April 30, 2019Assignee: EPISTAR CORPORATIONInventors: Kai Shen Chen, Hsin Hsiung Huang, Wan Jung Lee, Pei Chia Chen, Yung Hsin Tai
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Publication number: 20170309783Abstract: A substrate wafer composed of a hexagonal single crystal material including a C crystalline plane, an A crystalline plane, and an M-axis direction includes a top surface is a C-axis plane; a first side connecting to the aforementioned top surface and being substantially a curve line viewing from the direction perpendicular to the aforementioned C crystalline plane and including a curvature center; and a second side connecting to the aforementioned first side; and wherein there is a line segment defined by a shortest distance between the aforementioned second side and the aforementioned curvature center, and the aforementioned line segment is not parallel with the aforementioned M-axis direction.Type: ApplicationFiled: April 20, 2017Publication date: October 26, 2017Inventors: Kai Shen CHEN, Hsin Hsiung HUANG, Wan Jung LEE, Pei Chia CHEN, Yung Hsin TAI
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Patent number: 9583677Abstract: A method of manufacturing a light-emitting diode comprises the steps of providing a substrate comprising an upper surface and a bottom surface opposite to the upper surface; providing a semiconductor stack layer on the upper surface, wherein the semiconductor stack layer comprises a first type semiconductor layer having a first surface, a light-emitting layer on the first type semiconductor layer for emitting light, and a second type semiconductor layer on the light-emitting layer; treating the first surface to form a second surface, wherein the second surface is flatter than the first surface; and providing a laser beam through the second surface to cut the substrate.Type: GrantFiled: April 20, 2015Date of Patent: February 28, 2017Assignee: EPISTAR CORPORATIONInventors: Liang-Sheng Chi, Pei-Chia Chen, Chih-Hao Chen
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Publication number: 20150228856Abstract: A method of manufacturing a light-emitting diode comprises the steps of providing a substrate comprising an upper surface and a bottom surface opposite to the upper surface; providing a semiconductor stack layer on the upper surface, wherein the semiconductor stack layer comprises a first type semiconductor layer having a first surface, a light-emitting layer on the first type semiconductor layer for emitting light, and a second type semiconductor layer on the light-emitting layer; treating the first surface to form a second surface, wherein the second surface is flatter than the first surface; and providing a laser beam through the second surface to cut the substrate.Type: ApplicationFiled: April 20, 2015Publication date: August 13, 2015Inventors: Liang-Sheng CHI, Pei-Chia CHEN, Chih-Hao CHEN
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Patent number: 9012933Abstract: A light-emitting diode includes a substrate, the substrate including an upper surface, a bottom surface opposite to the upper surface, and a side surface; a first type semiconductor layer on the upper surface, wherein the first type semiconductor layer includes a first portion and a second portion, and the second portion includes an edge surrounding the first portion; a light-emitting layer on the first portion; and a second type semiconductor layer on the light-emitting layer, wherein the second portion includes a first surface and a second surface, and a first distance is between the first surface and the upper surface, and a second distance is between the second surface and the upper surface and is smaller than the first distance; wherein the first surface is rougher than the second surface, and the second surface is located at the edge.Type: GrantFiled: April 8, 2013Date of Patent: April 21, 2015Assignee: Epistar CorporationInventors: Liang-Sheng Chi, Pei-Chia Chen, Chih-Hao Chen
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Publication number: 20140299901Abstract: A light-emitting diode, comprising: a substrate, the substrate comprising an upper surface, a bottom surface opposite to the upper surface, and a side surface; a first type semiconductor layer on the upper surface, wherein the first type semiconductor layer comprises a first portion and a second portion, and the second portion comprises an edge surrounding the first portion; a light-emitting layer on the first portion; and a second type semiconductor layer on the light-emitting layer, wherein the second portion comprising a first surface and a second surface, and a first distance is between the first surface and the upper surface, and a second distance is between the second surface and the upper surface and is smaller than the first distance; wherein the first surface is rougher than the second surface, and the second surface is located at the edge.Type: ApplicationFiled: April 8, 2013Publication date: October 9, 2014Applicant: Epistar CorporationInventors: Liang-Sheng CHI, Pei-Chia CHEN, Chih-Hao CHEN