Abstract: A system includes an isolated converter having a power transformer with a primary winding, a secondary winding, and an auxiliary winding. The system also includes: 1) a first switch coupled to the primary winding; 2) a switch controller coupled to the first switch; and 3) a bias power regulator circuit coupled to the auxiliary winding and the switch controller. The bias power regulator circuit includes a second switch. The bias power regulator circuit is configured to provide a bias supply output voltage to the switch controller based on a first set of modes that modulate a switching frequency of the second switch and based on a second mode in which the second switch stays off.

Abstract: A converter includes a power stage to provide a current through a primary winding of a transformer in response to a PWM signal and to induce a current in a secondary winding of the transformer to generate an output voltage. The power stage has a switching terminal. The converter also includes a controller, a clamp circuit, and an impedance device. The controller includes a first transistor coupled with a second transistor to initiate an operational voltage during a startup mode and to provide a control voltage based on an amplitude of a switching voltage at the switching terminal during a switching mode. The clamp circuit couples between the control input of the first transistor and a reference terminal and clamps a voltage at the first control input responsive to the switching voltage exceeding a clamp voltage. The impedance device couples between the switching terminal and the clamp circuit.

Abstract: A converter system (100) includes a transformer (102) having a primary side (104) and a secondary side (106), a first switch (114) with a first terminal (1151) coupled to the primary side (104) and a second terminal (1152) coupled to a voltage supply terminal, a second switch (116) coupled to the first terminal (1151) of the first switch (114), loop control circuitry (119), coupled to the secondary side (106), and configured to generate an offset signal based on an output voltage provided at the secondary side (106) and to generate a compensated signal by compensating the offset signal to a sensed signal being representative of a first current flowing through the primary side (104), and switch control circuitry (120), coupled to the loop control circuitry (119), and configured to operate the first and second switches (114, 116) based on the compensated signal.

Abstract: A system includes an isolated converter having a power transformer with a primary winding, a secondary winding, and an auxiliary winding. The system also includes: 1) a first switch coupled to the primary winding; 2) a switch controller coupled to the first switch; and 3) a bias power regulator circuit coupled to the auxiliary winding and the switch controller. The bias power regulator circuit includes a second switch. The bias power regulator circuit is configured to provide a bias supply output voltage to the switch controller based on a first set of modes that modulate a switching frequency of the second switch and based on a second mode in which the second switch stays off.

Abstract: A system includes an isolated converter having a power transformer with a primary winding, a secondary winding, and an auxiliary winding. The system also includes: 1) a first switch coupled to the primary winding; 2) a switch controller coupled to the first switch; and 3) a bias power regulator circuit coupled to the auxiliary winding and the switch controller. The bias power regulator circuit includes a second switch. The bias power regulator circuit is configured to provide a bias supply output voltage to the switch controller based on a first set of modes that modulate a switching frequency of the second switch and based on a second mode in which the second switch stays off.

Abstract: A power converter circuit includes a power stage that includes a transformer and a switch. The switch can be controlled in response to a PWM signal to provide a primary current through a primary winding of the transformer to induce a secondary current in a secondary winding of the transformer to generate an output voltage. The power stage includes a switching node between the switch and the primary winding having a switching voltage. The circuit also includes a switching controller configured to generate the PWM signal in response to a ramp signal. The ramp signal can have an amplitude of a slope that is proportional to a decay rate of a magnetizing current of the transformer and generated in response to feedback from the power stage. The switch can be activated in response to the switching voltage having an amplitude of approximately zero volts based on the amplitude of the ramp signal.

Abstract: In some examples, a circuit includes an input circuit, an output circuit, an auxiliary circuit, and a balancing circuit. The input circuit comprises a primary capacitor coupled to primary windings of a transformer. The output circuit comprises a secondary capacitor coupled to secondary windings of the transformer, wherein the secondary windings are coupled to the primary windings. The auxiliary circuit comprises auxiliary windings coupled to the primary windings. The balancing circuit is coupled to the output circuit, the auxiliary circuit, and the input circuit. The balancing circuit is configured to balance a voltage across the primary capacitor with a voltage across the secondary capacitor.

Abstract: An apparatus is disclosed for improving zero voltage switching (“ZVS”) of a converter circuit such as an active clamp flyback converter. The apparatus includes a first timing circuit acting as the TD(L-H) optimizer, which uses the zero-crossing of the auxiliary winding voltage directly to adaptively vary the dead time. A second timing circuit acting as the TD(H-L) optimizer adaptively varies the dead time with a simple piece-wide linear function as an approximation of the complex optimal equation. A third timing circuit acting as the TDM optimizer contains a charge-pump circuit that adaptively adjusts the ON time of the clamp switch based on the zero-voltage detection of switching node voltage and feed-forwards the input voltage signal to enhance tuning speed so that the correct amount of negative magnetizing current is generated to improve zero voltage switching.

Abstract: A converter system (100) includes a transformer (102) having a primary side (104) and a secondary side (106), a first switch (114) with a first terminal (1151) coupled to the primary side (104) and a second terminal (1152) coupled to a voltage supply terminal, a second switch (116) coupled to the first terminal (1151) of the first switch (114), loop control circuitry (119), coupled to the secondary side (106), and configured to generate an offset signal based on an output voltage provided at the secondary side (106) and to generate a compensated signal by compensating the offset signal to a sensed signal being representative of a first current flowing through the primary side (104), and switch control circuitry (120), coupled to the loop control circuitry (119), and configured to operate the first and second switches (114, 116) based on the compensated signal.

Abstract: In some examples, a circuit includes an input circuit, an output circuit, an auxiliary circuit, and a balancing circuit. The input circuit comprises a primary capacitor coupled to primary windings of a transformer. The output circuit comprises a secondary capacitor coupled to secondary windings of the transformer, wherein the secondary windings are coupled to the primary windings. The auxiliary circuit comprises auxiliary windings coupled to the primary windings. The balancing circuit is coupled to the output circuit, the auxiliary circuit, and the input circuit. The balancing circuit is configured to balance a voltage across the primary capacitor with a voltage across the secondary capacitor.

Abstract: A power converter circuit includes a power stage comprising a transformer and a power switch. The power switch can be controlled in response to a PWM signal to provide a primary current through a primary winding of the transformer to induce a secondary current in a secondary winding of the transformer to generate an output voltage. The power stage includes a switching node having a switching voltage between the power switch and the primary winding. A switching controller includes a control transistor device to initiate an operational voltage associated with the control transistor device during a startup mode of the power converter circuit and to provide a control voltage based on an amplitude of the switching voltage during a normal operating mode. The switching controller generates the PWM signal in response to comparing the control voltage and a predetermined switching threshold voltage.

Abstract: A switch-mode power supply includes a transformer, a power transistor, pulse generation circuitry, and a dual ramp modulation (DRM) circuit. The power transistor is coupled to a primary coil of the transformer. The pulse generation circuitry is configured to generate a power transistor activation signal. The DRM circuit is coupled to the pulse generation circuitry. The DRM circuit is configured to generate a leading edge blank time signal that disables inactivation of the power transistor activation signal for a predetermined interval (a leading edge blank time) after a leading edge of the power transistor activation signal. The DRM circuit is also configured to generate a reset signal that inactivates the power transistor activation signal while the leading edge blank time signal is activated.

Abstract: A device includes a pulse generation circuit configured to cause a primary side of a flyback converter to generate a burst of pulses while a signal is enabled, a set-reset latch configured to output the signal and to reset in response to a number of pulses in the burst approaching a threshold, a comparator configured to set the set-reset latch when a compensated feedback voltage reaches a reference voltage, and a ripple compensation circuit configured to adjust a feedback voltage from a secondary side of the flyback converter by a compensation voltage to generate the compensated feedback voltage.

Abstract: A system includes an isolated converter having a power transformer with a primary winding, a secondary winding, and an auxiliary winding. The system also includes: 1) a first switch coupled to the primary winding; 2) a switch controller coupled to the first switch; and 3) a bias power regulator circuit coupled to the auxiliary winding and the switch controller. The bias power regulator circuit includes a second switch. The bias power regulator circuit is configured to provide a bias supply output voltage to the switch controller based on a first set of modes that modulate a switching frequency of the second switch and based on a second mode in which the second switch stays off.

Abstract: An apparatus is disclosed for improving zero voltage switching (“ZVS”) of a converter circuit such as an active clamp flyback converter. The apparatus includes a first timing circuit acting as the TD(L?H) optimizer, which uses the zero-crossing of the auxiliary winding voltage directly to adaptively vary the dead time. A second timing circuit acting as the TD(H?L) optimizer adaptively varies the dead time with a simple piece-wide linear function as an approximation of the complex optimal equation. A third timing circuit acting as the TDM optimizer contains a charge-pump circuit that adaptively adjusts the ON time of the clamp switch based on the zero-voltage detection of switching node voltage and feed-forwards the input voltage signal to enhance tuning speed so that the correct amount of negative magnetizing current is generated to improve zero voltage switching.

Abstract: These teachings apply with respect to a direct current (DC)-output converter and provide for adjusting a number of switching pulses per burst cycle as a function, at least in part, of converter output loading. This adjustment can be made by controlling burst frequency with respect to at least one predetermined threshold frequency. The predetermined threshold frequency can comprise a non-audible frequency such that the number of switching pulses is adjusted to prevent the burst frequency from itself constituting an audible signal. The adjustment of the number of switching pulses per burst cycle may only occur when the output loading is less than a predetermined level of loading. These teachings may also provide for clamping the pulse frequency for the pulses in each burst package to a particular value when dynamically controlling the number of pulses in each burst package. The aforementioned particular value may constitute, for example, a highest available switching frequency.

Abstract: An apparatus is disclosed for improving zero voltage switching (“ZVS”) of a converter circuit such as an active clamp flyback converter. The apparatus includes a first timing circuit acting as the TD(L-H) optimizer, which uses the zero-crossing of the auxiliary winding voltage directly to adaptively vary the dead time. A second timing circuit acting as the TD(H-L) optimizer adaptively varies the dead time with a simple piece-wide linear function as an approximation of the complex optimal equation. A third timing circuit acting as the TDM optimizer contains a charge-pump circuit that adaptively adjusts the ON time of the clamp switch based on the zero-voltage detection of switching node voltage and feed-forwards the input voltage signal to enhance tuning speed so that the correct amount of negative magnetizing current is generated to improve zero voltage switching.

Abstract: A device includes a pulse generation circuit configured to cause a primary side of a flyback converter to generate a burst of pulses while a signal is enabled, a set-reset latch configured to output the signal and to reset in response to a number of pulses in the burst approaching a threshold, a comparator configured to set the set-reset latch when a compensated feedback voltage reaches a reference voltage, and a ripple compensation circuit configured to adjust a feedback voltage from a secondary side of the flyback converter by a compensation voltage to generate the compensated feedback voltage.

Abstract: These teachings apply with respect to a direct current (DC)-output converter and provide for adjusting a number of switching pulses per burst cycle as a function, at least in part, of converter output loading. This adjustment can be made by controlling burst frequency with respect to at least one predetermined threshold frequency. The predetermined threshold frequency can comprise a non-audible frequency such that the number of switching pulses is adjusted to prevent the burst frequency from itself constituting an audible signal. The adjustment of the number of switching pulses per burst cycle may only occur when the output loading is less than a predetermined level of loading. These teachings may also provide for clamping the pulse frequency for the pulses in each burst package to a particular value when dynamically controlling the number of pulses in each burst package. The aforementioned particular value may constitute, for example, a highest available switching frequency.

Abstract: A power converter using constant on-time (COT) or ramp pulse modulation (RPM) control achieves more rapid resumption of steady-state operation after a step-up load transient by extending an on-time of a switching pulse by interrupting a ramp voltage waveform that is compared with a threshold that equals a threshold voltage at the termination of a switching pulse or increasing a voltage with which the ramp voltage is compared. These techniques are applied to both single-phase and multi-phase power converters.